Semiconductor device, display device including semiconductor device, display module including display device, and electronic device including semiconductor device, display device, and display module

ABSTRACT

A semiconductor device including a transistor and a wiring electrically connected to the transistor each of which has excellent electrical characteristics because of specific structures thereover is provided. A first conductive film, a first insulating film over the first conductive film, a second conductive film over the first insulating film, a second insulating film over the second conductive film, a third conductive film electrically connected to the first conductive film through an opening provided in the first insulating film and the second insulating film, and a third insulating film over the third conductive film are provided. The third conductive film includes indium, tin, and oxygen, and the third insulating film includes silicon and nitrogen and the number of ammonia molecules released from the third insulating film is less than or equal to 1×1015 molecules/cm3 by thermal desorption spectroscopy.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 14/659,792, filed Mar. 17, 2015, now pending, which claims the benefit of a foreign priority application filed in Japan as Serial No. 2014-057528 on Mar. 20, 2014, both of which are incorporated by reference.

BACKGROUND OF THE INVENTION 1. Field of the Invention

One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor and a display device including the semiconductor device.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. In addition, the present invention relates to a process, a machine, manufacture, or a composition of matter. In particular, the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof.

In this specification and the like, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics. A semiconductor element such as a transistor, a semiconductor circuit, an arithmetic device, and a memory device are each an embodiment of a semiconductor device. An imaging device, a display device, a liquid crystal display device, a light-emitting device, an electro-optical device, a power generation device (including a thin film solar cell, an organic thin film solar cell, and the like), and an electronic device may each include a semiconductor device.

2. Description of the Related Art

Attention has been focused on a technique for forming a transistor using a semiconductor thin film formed over a substrate having an insulating surface (also referred to as a field-effect transistor (FET) or a thin film transistor (TFT)). Such transistors are applied to a wide range of electronic devices such as an integrated circuit (IC) and an image display device (display device). A semiconductor material typified by silicon is widely known as a material for a semiconductor thin film that can be used for a transistor. As another material, an oxide semiconductor has been attracting attention (see Patent Document 1).

For example, as a transistor including an oxide semiconductor film, a transistor is disclosed in which the numbers of hydrogen molecules and ammonia molecules which are released from a nitride insulating film provided over the transistor are reduced and a change in electrical characteristics is suppressed (see Patent Document 2).

In recent years, with increased performance and reductions in the size and weight of electronic devices, demand for a display device in which a driver circuit is formed so that miniaturized transistors, connection wirings, or the like are integrated with high density, and the driver circuit and the display device are provided on the same substrate has risen.

REFERENCE Patent Document

-   [Patent Document 1] Japanese Published Patent Application No.     2006-165529 -   [Patent Document 2] Japanese Published Patent Application No.     2014-030002

SUMMARY OF THE INVENTION

As a wiring connected to a transistor (also referred to as a lead wiring), a multi-layer structure is preferred to a single-layer structure because the wirings can be integrated with high density. In the case of a wiring having a multi-layer structure, it is preferable to use a conductive film which is formed through steps of processing the same conductive film as conductive films used for a gate electrode, a source electrode, or a drain electrode of the transistor or a pixel electrode electrically connected to the transistor, in which case the manufacturing cost can be reduced because the number of steps (the number of masks) can be reduced.

For example, in the case where a transparent conductive film functioning as a pixel electrode is used for the wiring connected to a transistor (such as a lead wiring), the wirings can be integrated with high density. When used for a lead wiring or the like, however, the transparent conductive film might be corroded during operation in a high-temperature and high-humidity environment (e.g., operation at a temperature of 60° C. and a humidity of 95%). When included in a display device, a semiconductor device having such a wiring decreases the yield of the display device because of corrosion of the wiring.

In addition, when the transistor includes an oxide semiconductor film in a semiconductor layer and a protective film is formed over the wiring to prevent its corrosion, entry of moisture or the like released from the protective film into the oxide semiconductor film might change electrical characteristics of the transistor.

In view of the above problems, an object of one embodiment of the present invention is to provide a semiconductor device including a transistor and a wiring electrically connected to the transistor each of which has excellent electrical characteristics because of specific structures thereover.

Another object of one embodiment of the present invention is to provide a semiconductor device with high productivity. Another object of one embodiment of the present invention is to provide a semiconductor device that is suitable for miniaturization. Another object of one embodiment of the present invention is to provide a semiconductor device including an oxide semiconductor with favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device including an oxide semiconductor in which a change in the electrical characteristics is suppressed. Another object of one embodiment of the present invention is to provide a novel semiconductor device. Another object of one embodiment of the present invention is to provide a novel display device.

Note that the description of the above object does not disturb the existence of other objects. In one embodiment of the present invention, there is no need to achieve all the objects. Objects other than the above objects will be apparent from and can be derived from the description of the specification and the like.

One embodiment of the present invention is a semiconductor device including a first conductive film, a first insulating film over the first conductive film, a second conductive film over the first insulating film, a second insulating film over the second conductive film, a third conductive film electrically connected to the first conductive film through an opening provided in the first insulating film and the second insulating film, and a third insulating film over the third conductive film. The third conductive film includes indium and oxygen, and the third insulating film includes silicon and nitrogen and the number of ammonia molecules released from the third insulating film is less than or equal to 1×10¹⁵ molecules/cm³ by thermal desorption spectroscopy.

Another embodiment of the present invention is a semiconductor device including a first conductive film, a first insulating film over the first conductive film, an oxide semiconductor film over the first insulating film, a pair of second conductive films electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film and the pair of second conductive films, a third conductive film electrically connected to the first conductive film through an opening provided in the first insulating film and the second insulating film, and a third insulating film over the third conductive film. The third conductive film includes indium and oxygen, and the third insulating film includes silicon and nitrogen and the number of ammonia molecules released from the third insulating film is less than or equal to 1×10¹⁵ molecules/cm³ by thermal desorption spectroscopy.

In any of the above embodiments, it is preferable that the third conductive film further include tin and silicon.

In any of the above embodiments, it is preferable that the oxide semiconductor film include oxygen, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), and it is preferable that the oxide semiconductor film include a crystal part and that the crystal part have c-axis alignment.

Another embodiment of the present invention is a display device including the semiconductor device according to any one of the above embodiments, and a display element. Another embodiment of the present invention is a display module including the display device and a touch sensor. Another embodiment of the present invention is an electronic device including the semiconductor device according to any one of the above embodiments, the display device, or the display module; and at least one of an operation key and a battery.

According to one embodiment of the present invention, a semiconductor device including a transistor and a wiring electrically connected to the transistor each of which has excellent electrical characteristics because of specific structures thereover, or a semiconductor device having excellent productivity can be provided. According to one embodiment of the present invention, a semiconductor device that is suitable for miniaturization can be provided. According to one embodiment of the present invention, a semiconductor device including an oxide semiconductor can be provided with favorable electrical characteristics. According to one embodiment of the present invention, a highly reliable semiconductor device including an oxide semiconductor in which a change in the electrical characteristics is suppressed can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a novel display device can be provided.

Note that the description of these effects does not disturb the existence of other effects. One embodiment of the present invention does not necessarily achieve all the effects listed above. Other effects will be apparent from and can be derived from the description of the specification, the drawings, the claims, and the like.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device.

FIGS. 2A and 2B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device.

FIGS. 3A to 3C are a top view and cross-sectional views illustrating one embodiment of a semiconductor device.

FIGS. 4A to 4C are a top view and cross-sectional views illustrating one embodiment of a semiconductor device.

FIGS. 5A to 5C are a top view and cross-sectional views illustrating one embodiment of a semiconductor device.

FIGS. 6A to 6C are a top view and cross-sectional views illustrating one embodiment of a semiconductor device.

FIGS. 7A to 7D are cross-sectional views each illustrating one embodiment of a semiconductor device.

FIGS. 8A and 8B are band diagrams.

FIGS. 9A to 9C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 10A and 10B are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 11A and 11B are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 12A and 12B are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 13A to 13D are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 14A to 14C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 15A and 15B are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 16A to 16D are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 17A to 17D are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device.

FIGS. 18A to 18D are Cs-corrected high-resolution TEM images of a cross section of a CAAC-OS and a cross-sectional schematic view of a CAAC-OS.

FIGS. 19A to 19D are Cs-corrected high-resolution TEM images of a plane of a CAAC-OS.

FIGS. 20A to 20C show structural analysis of a CAAC-OS and a single crystal oxide semiconductor by XRD.

FIGS. 21A and 21B show electron diffraction patterns of a CAAC-OS.

FIG. 22 is a top view illustrating one embodiment of a display device.

FIG. 23 is a cross-sectional view illustrating one embodiment of a display device.

FIG. 24 is a cross-sectional view illustrating one embodiment of a display device.

FIGS. 25A to 25C are a block diagram and circuit diagrams illustrating a display device.

FIG. 26 illustrates a display module.

FIGS. 27A to 27H illustrate electronic devices.

FIG. 28 shows temperature dependence of resistivity.

FIG. 29 shows the numbers of ammonia molecules released in samples in Example.

FIG. 30 is a top view illustrating a sample in Example.

FIGS. 31A and 31B show observation results by an optical micrograph in Example.

FIGS. 32A and 32B show observation results by an optical micrograph in Example.

FIG. 33 shows a change in crystal part of an In-Ga-Zn oxide induced by electron irradiation.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments will be described with reference to drawings. However, the embodiments can be implemented with various modes. It will be readily appreciated by those skilled in the art that modes and details can be changed in various ways without departing from the spirit and scope of the present invention. Thus, the present invention should not be interpreted as being limited to the following description of the embodiments. In describing structures of the present invention with reference to the drawings, common reference numerals are used for the same portions in different drawings. Note that the same hatched pattern is applied to similar parts, and the similar parts are not especially denoted by reference numerals in some cases.

In the drawings, the size, the layer thickness, or the region is exaggerated for clarity in some cases. Therefore, embodiments of the present invention are not limited to such a scale. Note that the drawings are schematic views showing ideal examples, and embodiments of the present invention are not limited to shapes or values shown in the drawings.

Note that in this specification, ordinal numbers such as “first”, “second”, and “third” are used in order to avoid confusion among components, and the terms do not limit the components numerically.

Note that in this specification, terms for describing arrangement, such as “over” “above”, “under”, and “below”, are used for convenience in describing a positional relation between components with reference to drawings. Furthermore, the positional relation between components is changed as appropriate in accordance with a direction in which each component is described. Thus, there is no limitation on terms used in this specification, and description can be made appropriately depending on the situation.

In this specification and the like, a transistor is an element having at least three terminals of a gate, a drain, and a source. In addition, the transistor has a channel region between a drain (a drain terminal, a drain region, or a drain electrode) and a source (a source terminal, a source region, or a source electrode), and current can flow through the drain region, the channel region, and the source region. Note that in this specification and the like, a channel region refers to a region through which current mainly flows.

Furthermore, functions of a source and a drain might be switched when transistors having different polarities are employed or a direction of current flow is changed in circuit operation, for example. Therefore, the terms “source” and “drain” can be switched in this specification and the like.

Note that in this specification and the like, the expression “electrically connected” includes the case where components are connected through an “object having any electric function”. There is no particular limitation on an “object having any electric function” as long as electric signals can be transmitted and received between components that are connected through the object. Examples of an “object having any electric function” are a switching element such as a transistor, a resistor, an inductor, a capacitor, and elements with a variety of functions as well as an electrode and a wiring.

Note that in this specification and the like, a “silicon oxynitride film” refers to a film that includes oxygen at a higher proportion than nitrogen, and a “silicon nitride oxide film” refers to a film that includes nitrogen at a higher proportion than oxygen.

In this specification and the like, the term “parallel” indicates that the angle formed between two straight lines is greater than or equal to −10° and less than or equal to 10°, and accordingly also includes the case where the angle is greater than or equal to −5° and less than or equal to 5°. In addition, a term “perpendicular” indicates that the angle formed between two straight lines is greater than or equal to 80° and less than or equal to 100°, and accordingly includes the case where the angle is greater than or equal to 85° and less than or equal to 95°.

Embodiment 1

In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 1A and 1B, FIGS. 2A and 2B, FIGS. 3A to 3C, FIGS. 4A to 4C, FIGS. 5A to 5C, FIGS. 6A to 6C, FIGS. 7A to 7D, FIGS. 8A and 8B, FIGS. 9A to 9C, FIGS. 10A and 10B, FIGS. 11A and 11B, FIGS. 12A and 12B, FIGS. 13A to 13D, FIGS. 14A to 14C, FIGS. 15A and 15B, FIGS. 16A to 16D, and FIGS. 17A to 17D.

<Structure Example 1 of Semiconductor Device>

FIG. 1A is a top view of a semiconductor device of one embodiment of the present invention. FIG. 1B is a cross-sectional view taken along a dashed dotted line A1-A2 in FIG. 1A. Note that in FIG. 1A, some components of the semiconductor device (e.g., an insulating film) are not illustrated to avoid complexity. As in FIG. 1A, some components are not illustrated in some cases in top views of semiconductor devices described below.

The semiconductor device illustrated in FIGS. 1A and 1B includes a conductive film 104 (also referred to as a first conductive film) over a substrate 102, an insulating film 106 (also referred to as a first insulating film) over the substrate 102 and the conductive film 104, a conductive film 112 (also referred to as a second conductive film) over the insulating film 106, insulating films 114, 116, and 118 (also collectively referred to as a second insulating film) over the conductive film 112, a conductive film 120 (also referred to as a third conductive film) electrically connected to the conductive film 104 through an opening 142 provided in the insulating film 106 and the insulating films 114, 116, and 118, and an insulating film 122 (also referred to as a third insulating film) over the conductive film 120.

The insulating film 106 has a stacked-layer structure of an insulating film 106 a and an insulating film 106 b. Note that the structure of the insulating film 106 is not limited thereto, the insulating film 106 may have a single-layer structure or a stacked-layer structure of three or more layers.

It is preferable that the conductive film 104 be formed through steps of processing the same conductive film as a conductive film used for a gate electrode of a transistor. It is preferable that the conductive film 112 be formed through steps of processing the same conductive film as a conductive film used for a source electrode and a drain electrode of the transistor. It is preferable that the conductive film 120 be formed through steps of processing the same conductive film as a conductive film used for a pixel electrode electrically connected to the transistor. The manufacturing cost can be reduced by thus forming the conductive films 104, 112, and 120 through steps of processing the same conductive films as the conductive films used for the transistor or the conductive film electrically connected to the transistor.

As illustrated in FIGS. 1A and 1B, the conductive films 104, 112, and 120 can be integrated with high density by being formed through steps of processing the same conductive films as the conductive films used for the transistor or the conductive film electrically connected to the transistor and having a multilayer structure with the insulating films positioned therebetween.

The conductive film 120 contains indium and oxygen. Alternatively, the conductive film 120 contains indium, tin, oxygen, and silicon. A material used for the conductive film 120 can be a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added.

The insulating film 122 contains silicon and nitrogen. The number of ammonia molecules released from the insulating film 122 is less than or equal to 1×10¹⁵ molecules/cm³ when analyzed by thermal desorption spectroscopy (TDS).

The insulating film 122 has a function of suppressing entry of moisture from the outside. In addition, the insulating film 122 includes a region from which a small number of ammonia molecules are released in the TDS analysis. With such an insulating film 122, corrosion of the conductive film 120 can be suppressed because entry of moisture from the outside during operation in a high-temperature and high-humidity environment (e.g., operation at a temperature of 60° C. and a humidity of 95%) is suppressed and the amount of moisture or the number of ammonia molecules released from the insulating film 122 is small. Since the insulating film 122 can suppress entry of moisture from the outside, corrosion of the conductive film 104 and the conductive film 112 can also be suppressed. Note that the insulating film 122 may have a single-layer structure or a stacked-layer structure of two or more layers.

Next, other components of the semiconductor device of this embodiment are described below in detail.

<Substrate>

There is no particular limitation on the property of a material and the like of the substrate 102 as long as the material has heat resistance enough to withstand at least heat treatment to be performed later. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 102. Alternatively, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon, silicon carbide, or the like, a compound semiconductor substrate made of silicon germanium or the like, an SOI substrate, or the like may be used as the substrate 102. Still alternatively, any of these substrates provided with a semiconductor 30 element may be used as the substrate 102. In the case where a glass substrate is used as the substrate 102, a glass substrate having any of the following sizes can be used: the 6th generation (1500 mm×1850 mm), the 7th generation (1870 mm×2200 mm), the 8th generation (2200 mm×2400 mm), the 9th generation (2400 mm×2800 mm), and the 10th generation (2950 mm×3400 mm). Thus, a large-sized display device can be manufactured.

Note that in this specification and the like, a semiconductor device can be formed using a variety of substrates. The type of a substrate is not limited to a certain type. As the substrate, a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SOI substrate, a glass substrate, a quartz substrate, a plastic substrate, a metal substrate, a stainless steel substrate, a substrate including stainless steel foil, a tungsten substrate, a substrate including tungsten foil, a flexible substrate, an attachment film, paper including a fibrous material, or a base material film can be used, for example. As an example of a glass substrate, a barium borosilicate glass substrate, an aluminoborosilicate glass substrate, or a soda lime glass substrate can be given. Examples of a flexible substrate, an attachment film, a base material film, or the like are as follows: plastic typified by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polyether sulfone (PES); a synthetic resin such as acrylic; polypropylene; polyester; polyvinyl fluoride; polyvinyl chloride; polyamide; polyimide; aramid; epoxy; an inorganic vapor deposition film; and paper.

Alternatively, a flexible substrate may be used as the substrate, and the transistor may be provided directly on the flexible substrate. Further alternatively, a separation layer may be provided between the substrate and the transistor. The separation layer can be used when part or the whole of a semiconductor device formed over the separation layer is separated from the substrate and transferred onto another substrate. In such a case, the transistor can be transferred to a substrate having low heat resistance or a flexible substrate as well. For the above separation layer, a stack of inorganic films, which are a tungsten film and a silicon oxide film, or an organic resin film of polyimide or the like formed over a substrate can be used, for example.

In other words, a semiconductor device may be formed using one substrate, and then transferred to another substrate. Examples of a substrate to which a semiconductor device is transferred are, in addition to the above substrate over which the semiconductor device can be formed, a paper substrate, a cellophane substrate, an aramid substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including a natural fiber (e.g., silk, cotton, or hemp), a synthetic fiber (e.g., nylon, polyurethane, or polyester), a regenerated fiber (e.g., acetate, cupra, rayon, or regenerated polyester), and the like), a leather substrate, and a rubber substrate. When such a substrate is used, a semiconductor device with excellent properties or a semiconductor device with low power consumption can be formed, a semiconductor device with high durability, high heat resistance can be provided, or reduction in weight or thickness can be achieved.

<First Conductive Film>

The conductive film 104 can be formed by a sputtering method or the like using a metal element selected from chromium (Cr), copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), and cobalt (Co); an alloy including any of these metal elements as its component; an alloy including a combination of any of these elements; or the like.

Furthermore, the conductive film 104 may have a single-layer structure or a stacked-layer structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked over an aluminum film, a two-layer structure in which a titanium film is stacked over a titanium nitride film, a two-layer structure in which a tungsten film is stacked over a titanium nitride film, a two-layer structure in which a tungsten film is stacked over a tantalum nitride film or a tungsten nitride film, and a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in this order can be given. Alternatively, an alloy film or a nitride film in which aluminum and one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium are combined may be used.

The conductive film 104 can be formed using a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added.

A Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be used for the conductive film 104. Use of an Cu—X alloy film enables the manufacturing cost to be reduced because wet etching process can be used in the processing.

<First Insulating Film>

As the insulating film 106, an insulating layer including at least one of the following films formed by a plasma enhanced chemical vapor deposition (PECVD) method, a sputtering method, or the like can be used: a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film. Note that instead of a stacked-layer structure of the insulating films 106 a and 106 b, an insulating film of a single layer or three or more layers formed using a material selected from the above may be used.

In this embodiment, a silicon nitride film is formed as the insulating film 106 a, and a silicon oxide film is formed as the insulating film 106 b.

<Second Conductive Film>

The conductive film 112 can be formed using a material and a method which are similar to those of the conductive film 104.

<Second Insulating Film>

The insulating films 114, 116, and 118 collectively function as a protective insulating film. The insulating films 114 and 116 contain oxygen. Furthermore, the insulating film 114 is an insulating film which is permeable to oxygen.

A silicon oxide film, a silicon oxynitride film, or the like with a thickness greater than or equal to 5 nm and less than or equal to 150 nm, or preferably greater than or equal to 5 nm and less than or equal to 50 nm can be used as the insulating film 114.

The insulating film 116 is formed using an oxide insulating film that contains oxygen in excess of that in the stoichiometric composition. Part of oxygen is released by heating from the oxide insulating film containing oxygen in excess of that in the stoichiometric composition. The oxide insulating film containing oxygen in excess of that in the stoichiometric composition is an oxide insulating film of which the amount of released oxygen converted into oxygen molecules is greater than or equal to 1.0×10¹⁹ atoms/cm³, or preferably greater than or equal to 3.0×10²⁰ atoms/cm³ in TDS analysis. Note that the temperature of the film surface in the TDS analysis is preferably higher than or equal to 100° C. and lower than or equal to 700° C., or higher than or equal to 100° C. and lower than or equal to 500° C.

A silicon oxide film, a silicon oxynitride film, or the like with a thickness greater than or equal to 30 nm and less than or equal to 500 nm, or preferably greater than or equal to 50 nm and less than or equal to 400 nm can be used as the insulating film 116.

Furthermore, the insulating films 114 and 116 can be formed using insulating films formed of the same kinds of materials; thus, a boundary between the insulating films 114 and 116 cannot be clearly observed in some cases. Thus, in this embodiment, the boundary between the insulating films 114 and 116 is shown by a dashed line. Although a two-layer structure of the insulating films 114 and 116 is described in this embodiment, the present invention is not limited to this. For example, a single-layer structure of the insulating film 114 may be used.

The insulating film 118 contains nitrogen. Alternatively, the insulating film 118 contains nitrogen and silicon. The insulating film 118 has a function of blocking oxygen, hydrogen, water, an alkali metal, an alkaline earth metal, or the like. A nitride insulating film, for example, can be used as the insulating film 118. The nitride insulating film is formed using silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide, or the like. Note that instead of the nitride insulating film having a blocking effect against oxygen, hydrogen, water, an alkali metal, an alkaline earth metal, and the like, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, may be provided. As the oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, an aluminum oxide film, an aluminum oxynitride film, a gallium oxide film, a gallium oxynitride film, an yttrium oxide film, an yttrium oxynitride film, a hafnium oxide film, and a hafnium oxynitride film can be given.

<Third Conductive Film>

The conductive film 120 contains indium and oxygen. Alternatively, the conductive film 120 contains indium, tin, and oxygen. Further alternatively, the conductive film 120 contains indium, tin, oxygen, and silicon. The conductive film 120 can be formed using a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added. Note that the conductive film 120 can be formed by a sputtering method or the like.

<Third Insulating Film>

The insulating film 122 can be formed using the material of the insulating film 122 described above. As the insulating film 122, for example, a silicon nitride film, a silicon nitride oxide film, a silicon oxide film, a silicon oxynitride film, an aluminum nitride film, an aluminum nitride oxide film, an aluminum oxide film, or an aluminum oxynitride film formed with a PECVD apparatus can be used. An ammonia gas is not necessarily used as a deposition gas of the silicon nitride film which is formed with a PECVD apparatus. Without using an ammonia gas as a deposition gas, it is possible to reduce the amount of ammonia entering the film. Therefore, the number of ammonia molecules released from the insulating film 122 can be made small.

<Structure Example 2 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from that of the semiconductor device described above, will be described with reference to FIGS. 2A and 2B. FIG. 2A is a top view of a semiconductor device of one embodiment of the 25 present invention. FIG. 2B is a cross-sectional view taken along a dashed dotted line A1-A2 in FIG. 2A.

The semiconductor device illustrated in FIGS. 2A and 2B includes the conductive film 104 over the substrate 102, the insulating film 106 over the substrate 102 and the conductive film 104, the conductive film 112 over the insulating film 106, the insulating films 114, 116, and 118 over the conductive film 112, the conductive film 120 electrically connected to the conductive film 104 through an opening 143 provided in the insulating films 114, 116, and 118 and the opening 142 provided in the insulating film 106, and the insulating film 122 over the conductive film 120.

The semiconductor device illustrated in FIGS. 2A and 2B is different from the semiconductor device illustrated in FIGS. 1A and 1B in that the opening 143 is provided. As illustrated in FIGS. 2A and 2B, with a structure in which an end portion of the opening 143 provided in the insulating films 114, 116, and 118 is provided outside an end portion of the opening 142 provided in the insulating film 106, coverage of the conductive film 120 and the insulating film 122 can be improved.

<Structure Example 3 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from those of the semiconductor devices described above, will be described with reference to FIGS. 3A to 3C. FIG. 3A is a top view of a transistor 100 that is a semiconductor device of one embodiment of the present invention. FIG. 3B is a cross-sectional view taken along a dashed dotted line X1-X2 in FIG. 3A, and FIG. 3C is a cross-sectional view taken along a dashed dotted line Y1-Y2 in FIG. 3A. Furthermore, the direction of the dashed dotted line X1-X2 may be called a channel length direction, and the direction of the dashed dotted line Y1-Y2 may be called a channel width direction.

The transistor 100 includes a conductive film 104 a functioning as a gate electrode over the substrate 102, the insulating film 106 over the substrate 102 and the conductive film 104 a, an oxide semiconductor film 108 over the insulating film 106, and conductive films 112 a and 112 b functioning as source and drain electrodes electrically connected to the oxide semiconductor film 108. Over the transistor 100, specifically, over the conductive films 112 a and 112 b and the oxide semiconductor film 108, the insulating films 114, 116, and 118 are provided. An opening 142 a reaching the conductive film 112 b is provided in the insulating films 114, 116, and 118, through which a conductive film 120 a electrically connected to the conductive film 112 b is provided. The insulating film 122 is provided over the insulating film 118 and the conductive film 120 a. Note that the insulating film 122 is formed so as to cover the end portion of the conductive film 120 a, and the conductive film 120 a includes a region not covered with the insulating film 122.

The insulating films 114, 116, and 118 collectively function as a protective insulating film for the transistor 100. The insulating film 122 functions as a protective insulating film for the transistor 100 and a protective insulating film for the conductive film 120 a. The conductive film 120 a functions as a pixel electrode used for a display device. The insulating film 106 functions as a gate insulating film of the transistor 100.

When oxygen vacancy is formed in the oxide semiconductor film 108 included in the transistor 100, electrons serving as carriers are generated; as a result, the transistor 100 tends to have normally-on characteristics. Therefore, to obtain stable transistor characteristics, it is important to reduce oxygen vacancy in the oxide semiconductor film 108. In the structure of the transistor of one embodiment of the present invention, excess oxygen is introduced into an insulating film over the oxide semiconductor film 108, here, the insulating film 114 over the oxide semiconductor film 108, whereby oxygen is moved from the insulating film 114 to the oxide semiconductor film 108 to fill oxygen vacancy in the oxide semiconductor film 108. Alternatively, excess oxygen is introduced into the insulating film 116 over the oxide semiconductor film 108, whereby oxygen is moved from the insulating film 116 to the oxide semiconductor film 108 through the insulating film 114 to fill oxygen vacancy in the oxide semiconductor film 108. Alternatively, excess oxygen is introduced into the insulating films 114 and 116 over the oxide semiconductor film 108, whereby oxygen is moved from both the insulating films 114 and 116 to the oxide semiconductor film 108 to fill oxygen vacancy in the oxide semiconductor film 108.

Therefore, the insulating films 114 and 116 include oxygen. It is preferable that the insulating films 114 and 116 each include a region (oxygen excess region) containing oxygen in excess of that in the stoichiometric composition. In other words, the insulating films 114 and 116 are each an insulating film capable of releasing oxygen. Note that the oxygen excess region is formed in each of the insulating films 114 and 116 in such a manner that oxygen is introduced into the insulating films 114 and 116 after the deposition, for example. As a method for introducing oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, plasma treatment, or the like may be employed.

In addition, the insulating film 122 functioning as a protective insulating film, which is provided over the transistor 100, includes a region from which a small number of ammonia molecules are released in the TDS analysis described above. Therefore, moisture or ammonia entering the oxide semiconductor film 108 of the transistor 100 can be reduced; thus, an impurity that might be bonded to an oxygen vacancy in the oxide semiconductor film 108 (here, the impurity is hydrogen or ammonia) is reduced. Accordingly, a highly reliable semiconductor device can be provided.

Next, other components of the transistor of this embodiment are described below in detail. Note that as for the components similar to those of the semiconductor device illustrated in FIGS. 1A and 1B and FIGS. 2A and 2B, description thereof is omitted here.

<Gate Electrode>

The conductive film 104 a functioning as a gate electrode of the transistor 100 can be formed using a material and a method which are similar to those of the conductive film 104 described above.

<Gate Insulating Film>

The insulating film 106 functioning as a gate insulating film of the transistor 100 can be formed using a material and a method which are similar to those of the insulating film 106 described above. The insulating film 106 functions as a blocking film which inhibits penetration of oxygen. For example, in the case where excess oxygen is supplied to the insulating film 106 b, the insulating film 114, the insulating film 116, and/or the oxide semiconductor film 108, the insulating film 106 can inhibit penetration of oxygen.

Note that the insulating film 106 b that is in contact with the oxide semiconductor film 108 functioning as a channel region of the transistor 100 is preferably an oxide insulating film and further preferably includes a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 106 b is an insulating film which is capable of releasing oxygen. In order to provide the oxygen excess region in the insulating film 106 b, the insulating film 106 b is formed in an oxygen atmosphere, for example. Alternatively, the oxygen excess region may be formed by introduction of oxygen into the insulating film 106 b after the deposition. As a method for introducing oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, plasma treatment, or the like may be employed.

In the case where hafnium oxide is used for the insulating film 106 b, the following effect is attained. Hafnium oxide has a higher dielectric constant than silicon oxide and silicon oxynitride. Therefore, a physical thickness can be made larger than an equivalent oxide thickness; thus, even in the case where the equivalent oxide thickness is less than or equal to 10 nm or less than or equal to 5 nm, leakage current due to tunnel current can be low. That is, it is possible to provide a transistor with a low off-state current. Moreover, hafnium oxide with a crystalline structure has a higher dielectric constant than hafnium oxide with an amorphous structure. Therefore, it is preferable to use hafnium oxide with a crystalline structure in order to provide a transistor with a low off-state current. Examples of the crystalline structure include a monoclinic crystal structure and a cubic crystal structure. Note that one embodiment of the present invention is not limited thereto.

The silicon nitride film has a higher dielectric constant than a silicon oxide film and needs a larger thickness for capacitance equivalent to that of the silicon oxide film. Thus, when the silicon nitride film is included in the gate insulating film of the transistor 100, the physical thickness of the insulating film can be increased. This makes it possible to reduce a decrease in withstand voltage of the transistor 100 and furthermore to increase the withstand voltage, thereby reducing electrostatic discharge damage to the transistor 100.

<Oxide Semiconductor Film>

The oxide semiconductor film 108 contains O, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). Typically, In—Ga oxide, In—Zn oxide, or In—M—Zn oxide can be used for the oxide semiconductor film 108. It is particularly preferable to use In—M—Zn oxide for the oxide semiconductor film 108.

In the case where the oxide semiconductor film 108 is formed of In—M—Zn oxide, it is preferable that the atomic ratio of metal elements of a sputtering target used for forming the In—M—Zn oxide satisfy In≥M and Zn≥M. As the atomic ratio of metal elements of such a sputtering target, In:M:Zn=1:1:1, InM:Zn=1:1:1.2, and In:M:Zn=3:1:2 are preferable. Note that the atomic ratios of metal elements in the formed oxide semiconductor film 108 vary from the above atomic ratio of metal elements of the sputtering target within a range of ±40% as an error.

Note that in the case where the oxide semiconductor film 108 is an In—M—Zn oxide film, the proportion of In and the proportion of M, not taking Zn and O into consideration, are preferably greater than or equal to 25 atomic % and less than 75 atomic %, respectively, or further preferably greater than or equal to 34 atomic % and less than 66 atomic %, respectively.

The energy gap of the oxide semiconductor film 108 is 2 eV or more, preferably 2.5 eV or more, or further preferably 3 eV or more. With the use of an oxide semiconductor having such a wide energy gap, the off-state current of the transistor 100 can be reduced.

The thickness of the oxide semiconductor film 108 is greater than or equal to 3 nm and less than or equal to 200 nm, preferably greater than or equal to 3 nm and less than or equal to 100 nm, or further preferably greater than or equal to 3 nm and less than or equal to 50 nm.

An oxide semiconductor film with low carrier density is used as the oxide semiconductor film 108. For example, an oxide semiconductor film whose carrier density is lower than 8×10¹¹/cm³, preferably lower than 1×10¹¹/cm³, further preferably lower than 1×10¹⁰/cm³, or still further preferably lower than 1×10⁻⁹/cm³ is used as the oxide semiconductor film 108.

Note that without limitation to the compositions and materials described above, a material with an appropriate composition may be used depending on required semiconductor characteristics and electrical characteristics (e.g., field-effect mobility and threshold voltage) of a transistor. Furthermore, in order to obtain required semiconductor characteristics of a transistor, it is preferable that the carrier density, the impurity concentration, the defect density, the atomic ratio of a metal element to oxygen, the interatomic distance, the density, and the like of the oxide semiconductor film 108 be set to be appropriate.

Note that it is preferable to use, as the oxide semiconductor film 108, an oxide semiconductor film in which the impurity concentration is low and density of defect states is low, in which case the transistor can have more excellent electrical characteristics. Here, the state in which impurity concentration is low and density of defect states is low (the number of oxygen vacancies is small) is referred to as “highly purified intrinsic” or “substantially highly purified intrinsic”. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Thus, a transistor in which a channel region is formed in the oxide semiconductor film rarely has a negative threshold voltage (is rarely normally on). A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states and accordingly has few carrier traps in some cases. Furthermore, the highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has an extremely low off-state current; even when an element has a channel width of 1×10⁶/μm and a channel length L of 10 μm, the off-state current can be less than or equal to the measurement limit of a semiconductor parameter analyzer, i.e., less than or equal to 1×10¹³ A, at a voltage (drain voltage) between a source electrode and a drain electrode of from 1 V to 10 V.

Accordingly, the transistor in which the channel region is formed in the highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film can have a small variation in electrical characteristics and high reliability. Charges trapped by the trap states in the oxide semiconductor film take a long time to be released and may behave like fixed charges. Thus, the transistor whose channel region is formed in the oxide semiconductor film having a high density of trap states has unstable electrical characteristics in some cases. As examples of the impurities, hydrogen, nitrogen, an alkali metal, an alkaline earth metal, and the like are given.

Hydrogen included in the oxide semiconductor film reacts with oxygen bonded to a metal atom to be water, and also causes an oxygen vacancy in a lattice from which oxygen is released (or a portion from which oxygen is released). Due to entry of hydrogen into the oxygen vacancy, an electron serving as a carrier is generated in some cases. Furthermore, in some cases, bonding of part of hydrogen to oxygen bonded to a metal element causes generation of an electron serving as a carrier. Thus, a transistor including an oxide semiconductor film which contains hydrogen is likely to have normally-on characteristics. Accordingly, it is preferable that hydrogen be reduced as much as possible in the oxide semiconductor film 108. Specifically, in the oxide semiconductor film 108, the concentration of hydrogen which is measured by secondary ion mass spectrometry (SIMS) is lower than or equal to 2×10²⁰ atoms/cm³, preferably lower than or equal to 5×10¹⁹ atoms/cm³, further preferably lower than or equal to 1×10¹⁹ atoms/cm³, further preferably lower than or equal to 5×10¹⁸ atoms/cm³, further preferably lower than or equal to 1×10¹⁸ atoms/cm³, further preferably lower than or equal to 5×10¹⁷ atoms/cm³, or further preferably lower than or equal to 1×10¹⁶ atoms/cm³.

When silicon or carbon that is one of elements belonging to Group 14 is contained in the oxide semiconductor film 108, oxygen vacancy is increased in the oxide semiconductor film 108, and the oxide semiconductor film 108 becomes an n-type film. Thus, the concentration of silicon or carbon (the concentration is measured by SIMS) in the oxide semiconductor film 108 or the concentration of silicon or carbon (the concentration is measured by SIMS) in the vicinity of an interface with the oxide semiconductor film 108 is set to be lower than or equal to 2×10¹⁸ atoms/cm³, or preferably lower than or equal to 2×10¹⁷ atoms/cm³.

In addition, the concentration of an alkali metal or an alkaline earth metal of the oxide semiconductor film 108, which is measured by SIMS, is lower than or equal to 1×10¹⁸ atoms/cm³, or preferably lower than or equal to 2×10¹⁶ atoms/cm³. An alkali metal and an alkaline earth metal might generate carriers when bonded to an oxide semiconductor, in which case the off-state current of the transistor might be increased. Therefore, it is preferable to reduce the concentration of an alkali metal or an alkaline earth metal of the oxide semiconductor film 108.

Furthermore, when containing nitrogen, the oxide semiconductor film 108 easily becomes n-type by generation of electrons serving as carriers and an increase of carrier density. Thus, a transistor including an oxide semiconductor film which contains nitrogen is likely to have normally-on characteristics. For this reason, nitrogen in the oxide semiconductor film is preferably reduced as much as possible; the concentration of nitrogen which is measured by SIMS is preferably set to be, for example, lower than or equal to 5×10¹⁸ atoms/cm³.

The oxide semiconductor film 108 may have a non-single-crystal structure, for example. The non-single crystal structure includes a c-axis aligned crystalline oxide semiconductor (CAAC-OS) which is described later, a polycrystalline structure, a microcrystalline structure, or an amorphous structure, for example. Among the non-single crystal structure, the amorphous structure has the highest density of defect states, whereas the CAAC-OS has the lowest density of defect states.

The oxide semiconductor film 108 may have a non-single-crystal structure, for example. The oxide semiconductor films having the amorphous structure each have disordered atomic arrangement and no crystalline component, for example. Alternatively, the oxide films having an amorphous structure have, for example, an absolutely amorphous structure and no crystal part.

Note that the oxide semiconductor film 108 may be a mixed film including two or more of the following: a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, a CAAC-OS region, and a region having a single-crystal structure. The mixed film has a single-layer structure including, for example, two or more of a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, a CAAC-OS region, and a region having a single-crystal structure in some cases. Furthermore, in some cases, the mixed film has a stacked-layer structure of two or more of a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, a CAAC-OS region, and a region having a single-crystal structure.

<Protective Insulating Film>

The insulating films 114, 116, and 118 collectively function as a protective insulating film. Note that the insulating film 114 also functions as a film which relieves damage to the oxide semiconductor film 108 at the time of forming the insulating film 116 in a later step.

In addition, it is preferable that the number of defects in the insulating film 114 be small and typically, the spin density corresponding to a signal that appears at g=2.001 due to a dangling bond of silicon be lower than or equal to 3×10¹⁷ spins/cm³ by electron spin resonance (ESR) measurement. This is because if the density of defects in the insulating film 114 is high, oxygen is bonded to the defects and the amount of oxygen that penetrates the insulating film 114 is decreased.

Note that all oxygen entering the insulating film 114 from the outside does not move to the outside of the insulating film 114 and some oxygen remains in the insulating film 114. Furthermore, movement of oxygen occurs in the insulating film 114 in some cases in such a manner that oxygen enters the insulating film 114 and oxygen included in the insulating film 114 moves to the outside of the insulating film 114. When an oxide insulating film which is permeable to oxygen is formed as the insulating film 114, oxygen released from the insulating film 116 provided over the insulating film 114 can be moved to the oxide semiconductor film 108 through the insulating film 114.

Note that the insulating film 114 can be formed using an oxide insulating film having a low density of states due to nitrogen oxide between the energy level of the valence band maximum (E_(v) _(_) _(os)) and the energy level of the conduction band minimum (E_(c) _(_) _(os)) of the oxide semiconductor film. A silicon oxynitride film that releases less nitrogen oxide, an aluminum oxynitride film that releases less nitrogen oxide, or the like can be used as the oxide insulating film in which the density of states due to nitrogen oxide is low between E_(v) _(_) _(os) and E_(c) _(_) _(os).

Note that a silicon oxynitride film that releases less nitrogen oxide is a film which releases more ammonia molecules than the nitrogen oxide in thermal desorption spectroscopy analysis; the number of ammonia molecules released from the silicon oxynitride film is typically greater than or equal to 1×10¹⁸ molecules/cm³ and less than or equal to 5×10¹⁹ molecules/cm³. Note that the number of ammonia molecules released from a film is the number of ammonia molecules released by heat treatment with which the surface temperature of the film becomes higher than or equal to 50° C. and lower than or equal to 650° C., or preferably higher than or equal to 50° C. and lower than or equal to 550° C.

Nitrogen oxide (NO_(x); x is greater than or equal to 0 and less than or equal to 2, or preferably greater than or equal to 1 and less than or equal to 2), typically NO₂ or NO, forms levels in the insulating film 114, for example. The level is positioned in the energy gap of the oxide semiconductor film 108. Therefore, when nitrogen oxide is diffused to the interface between the insulating film 114 and the oxide semiconductor film 108, an electron is trapped by the level on the insulating film 114 side. As a result, the trapped electron remains in the vicinity of the interface between the insulating film 114 and the oxide semiconductor film 108; thus, the threshold voltage of the transistor is shifted in the positive direction.

Nitrogen oxide reacts with ammonia and oxygen in heat treatment. Since nitrogen oxide contained in the insulating film 114 reacts with ammonia contained in the insulating film 116 in heat treatment, nitrogen oxide contained in the insulating film 114 is reduced. Therefore, an electron is hardly trapped at the interface between the insulating film 114 and the oxide semiconductor film 108.

By using, for the insulating film 114, the oxide insulating film having a low density of states of nitrogen oxide between E_(v) _(_) _(os) and E_(c) _(_) _(os), the shift in the threshold voltage of the transistor can be reduced, which leads to a smaller change in the electrical characteristics of the transistor.

Note that in an ESR spectrum at 100 K or lower of the insulating film 114, by heat treatment of a manufacturing process of the transistor, typically heat treatment at a temperature higher than or equal to 300° C. and lower than the strain point of the substrate, a first signal that appears at a g-factor greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor greater than or equal to 1.964 and less than or equal to 1.966 are observed. The split width of the first and second signals and the split width of the second and third signals that are obtained by ESR measurement using an X-band are each approximately 5 mT. The sum of the spin densities of the first signal that appears at a g-factor greater than or equal to 2.037 and less than or equal to 2.039, the second signal that appears at a g-factor greater than or equal to 2.001 and less than or equal to 2.003, and the third signal that appears at a g-factor greater than or equal to 1.964 and less than or equal to 1.966 is lower than 1×10¹⁸ spins/cm³, typically higher than or equal to 1×10¹⁷ spins/cm³ and lower than 1×10¹⁸ spins/cm³.

In the ESR spectrum at 100 K or lower, the first signal that appears at a g-factor greater than or equal to 2.037 and less than or equal to 2.039, the second signal that appears at a g-factor greater than or equal to 2.001 and less than or equal to 2.003, and the third signal that appears at a g-factor greater than or equal to 1.964 and less than or equal to 1.966 correspond to signals attributed to nitrogen oxide (NO_(x); x is greater than or equal to 0 and smaller than or equal to 2, or preferably greater than or equal to 1 and less than or equal to 2). Typical examples of nitrogen oxide include nitrogen monoxide and nitrogen dioxide. In other words, the lower the total spin density of the first signal that appears at a g-factor greater than or equal to 2.037 and less than or equal to 2.039, the second signal that appears at a g-factor greater than or equal to 2.001 and less than or equal to 2.003, and the third signal that appears at a g-factor greater than or equal to 1.964 and less than or equal to 1.966 is, the lower the content of nitrogen oxide in the oxide insulating film is.

The concentration of nitrogen of the oxide insulating film having a low density of states of nitrogen oxide between E_(v) _(_) _(os) and E_(c) _(_) _(os) measured by secondary mass spectrometry (SIMS) is lower than or equal to 6×10²⁰ atoms/cm³.

The oxide insulating film in which the density of states of nitrogen oxide is low between E_(v) _(_) _(os) and E_(c) _(_) _(os) is formed by a PECVD method at a substrate temperature higher than or equal to 220° C., higher than or equal to 280° C., or higher than or equal to 350° C. using silane and dinitrogen monoxide, whereby a dense and hard film can be formed.

It is preferable that the number of defects in the insulating film 116 be small, and typically the spin density corresponding to a signal that appears at g=2.001 due to a dangling bond of silicon, be lower than 1.5×10¹⁸ spins/cm³, or further preferably lower than or equal to 1×10¹⁸ spins/cm³ by ESR measurement. Note that the insulating film 116 is provided more apart from the oxide semiconductor film 108 than the insulating film 114 is; thus, the insulating film 116 may have higher density of defects than the insulating film 114.

<Conductive Film Functioning as Pixel Electrode>

The conductive film 120 a can be formed using a material and a method which are similar to those of the conductive film 120 described above.

Although the variety of films such as the conductive films, the insulating films, and the oxide semiconductor films which are described above can be formed by a sputtering method or a PECVD method, such films may be formed by another method, e.g., a thermal chemical vapor deposition (CVD) method or an atomic layer deposition (ALD) method. As an example of a thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method can be given.

A thermal CVD method has an advantage that no defect due to plasma damage is generated since it does not utilize plasma for forming a film.

Deposition by a thermal CVD method may be performed in such a manner that a source gas and an oxidizer are supplied to the chamber at a time so that the pressure in a chamber is set to an atmospheric pressure or a reduced pressure, and react with each other in the vicinity of the substrate or over the substrate.

Deposition by an ALD method may be performed in such a manner that the pressure in a chamber is set to an atmospheric pressure or a reduced pressure, source gases for reaction are sequentially introduced into the chamber, and then the sequence of the gas introduction is repeated. For example, two or more kinds of source gases are sequentially supplied to the chamber by switching respective switching valves (also referred to as high-speed valves). For example, a first source gas is introduced, an inert gas (e.g., argon or nitrogen) or the like is introduced at the same time as or after the introduction of the first gas so that the source gases are not mixed, and then a second source gas is introduced. Note that in the case where the first source gas and the inert gas are introduced at a time, the inert gas serves as a carrier gas, and the inert gas may also be introduced at the same time as the introduction of the second source gas. Alternatively, the first source gas may be exhausted by vacuum evacuation instead of the introduction of the inert gas, and then the second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer; then the second source gas is introduced to react with the first layer; as a result, a second layer is stacked over the first layer, so that a thin film is formed. The sequence of the gas introduction is repeated plural times until a desired thickness is obtained, whereby a thin film with excellent step coverage can be formed. The thickness of the thin film can be adjusted by the number of repetition times of the sequence of the gas introduction; therefore, an ALD method makes it possible to accurately adjust a thickness and thus is suitable for manufacturing a minute FET.

The variety of films such as the conductive films, the insulating films, the oxide 10 semiconductor films, and the metal oxide films in this embodiment can be formed by a thermal CVD method such as an MOCVD method. For example, in the case where an In—Ga—Zn—O film is formed, trimethylindium, trimethylgallium, and dimethylzinc are used. Note that the chemical formula of trimethylindium is In(CH₃)₃. The chemical formula of trimethylgallium is Ga(CH₃)₃. The chemical formula of dimethylzinc is Zn(CH₃)₂. Without limitation to the above combination, triethylgallium (chemical formula: Ga(C₂H₅)₃) can be used instead of trimethylgallium and diethylzinc (chemical formula: Zn(C₂H₅)₂) can be used instead of dimethylzinc.

For example, in the case where a hafnium oxide film is formed by a deposition apparatus using an ALD method, two kinds of gases, i.e., ozone (O₃) as an oxidizer and a source gas which is obtained by vaporizing liquid containing a solvent and a hafnium precursor compound (e.g., a hafnium alkoxide or a hafnium amide such as tetrakis(dimethylamide)hafnium (TDMAH)) are used. Note that the chemical formula of tetrakis(dimethylamide)hafnium is Hf[N(CH₃)₂[₄. Examples of another material liquid include tetrakis(ethylmethylamide)hafnium.

For example, in the case where an aluminum oxide film is formed by a deposition apparatus using an ALD method, two kinds of gases, e.g., H₂O as an oxidizer and a source gas which is obtained by vaporizing liquid containing a solvent and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) are used. Note that the chemical formula of trimethylaluminum is Al(CH₃)₃. Examples of another material liquid include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate).

For example, in the case where a silicon oxide film is formed by a deposition apparatus using an ALD method, hexachlorodisilane is adsorbed on a surface where a film is to be formed, chlorine included in the adsorbate is removed, and radicals of an oxidizing gas (e.g., O₂ or dinitrogen monoxide) are supplied to react with the adsorbate.

For example, in the case where a tungsten film is formed by a deposition apparatus using an ALD method, a WF₆ gas and a B₂H₆ gas are sequentially introduced plural times to form an initial tungsten film, and then a WF₆ gas and an H₂ gas are sequentially introduced plural times to form a tungsten film. Note that an SiH₄ gas may be used instead of a B₂H₆ gas.

For example, in the case where an oxide semiconductor film, e.g., an In—Ga—Zn—O film is formed by a deposition apparatus using an ALD method, an In(CH₃)₃ gas and an O₃ gas are sequentially introduced plural times to form an In—O layer, a Ga(CH₃)₃ gas and an O₃ gas are sequentially introduced plural times to form a GaO layer, and then a Zn(CH₃)₂ gas and an O₃ gas are sequentially introduced plural times to form a ZnO layer. Note that the order of these layers is not limited to this example. A mixed compound layer such as an In—Ga—O layer, an In—Zn—O layer, or a Ga—Zn—O layer may be formed by using of these gases. Note that although an H₂O gas which is obtained by bubbling with an inert gas such as Ar may be used instead of an O₃ gas, it is preferable to use an O₃ gas, which does not contain H. Furthermore, instead of an In(CH₃)₃ gas, an In(C₂H₅)₃ gas may be used. Instead of a Ga(CH₃)₃ gas, a Ga(C₂H₅)₃ gas may be used. Furthermore, a Zn(CH₃)₂ gas may be used.

<Structure Example 4 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from those of the semiconductor devices described above, will be described with reference to FIGS. 4A to 4C. FIG. 4A is a top view of a transistor 150 that is a semiconductor device of one embodiment of the present invention. FIG. 4B is a cross-sectional view taken along a dashed dotted line X1-X2 in FIG. 4A, and FIG. 4C is a cross-sectional view taken along a dashed dotted line Y1-Y2 in FIG. 4A.

The transistor 150 includes the conductive film 104 a over the substrate 102, the insulating film 106 over the substrate 102 and the conductive film 104 a, the oxide semiconductor film 108 over the insulating film 106, the insulating film 114 over the oxide semiconductor film 108, the insulating film 116 over the insulating film 114, and the conductive films 112 a and 112 b functioning as source and drain electrodes electrically connected to the oxide semiconductor film 108 though openings 141 a and 141 b provided in the insulating films 114 and 116. Over the transistor 150, specifically, over the conductive films 112 a and 112 b and the insulating film 116, the insulating film 118 is provided. An opening 142 b reaching the conductive film 112 b is provided in the insulating film 118, through which the conductive film 120 a electrically connected to the conductive film 112 b is provided. The insulating film 122 is provided over the insulating film 118 and the conductive film 120 a. Note that the insulating film 122 is formed so as to cover the end portion of the conductive film 120 a, and the conductive film 120 a includes a region not covered with the insulating film 122.

The insulating films 114 and 116 collectively function as a protective insulating film for the oxide semiconductor film 108. The insulating film 118 functions as a protective insulating film for the transistor 150. The insulating film 122 functions as a protective insulating film for the transistor 150 and a protective insulating film for the conductive film 120 a. The conductive film 120 a functions as a pixel electrode used for a display device. The insulating film 106 functions as a gate insulating film of the transistor 150.

Although the transistor 100 described above has a channel-etched structure, the transistor 150 in FIGS. 4A to 4C has a channel-protective structure. Thus, either the channel-etched structure or the channel-protective structure can be applied to the semiconductor device of one embodiment of the present invention.

Like the transistor 100, the transistor 150 is provided with the insulating film 114 over the oxide semiconductor film 108; therefore, oxygen contained in the insulating film 114 or oxygen contained in the insulating film 116 can fill an oxygen vacancy in the oxide semiconductor film 108. In addition, the insulating film 122 functioning as a protective insulating film is provided over the transistor 150; therefore, impurities that might be bonded to oxygen vacancies in the oxide semiconductor film 108 are reduced.

Since the insulating film 122 is provided over the transistor 150, entry of moisture from the outside can be suppressed.

<Structure Example 5 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from those of the semiconductor devices described above, will be described with reference to FIGS. 5A to 5C. FIG. 5A is a top view of a transistor 160 that is a semiconductor device of one embodiment of the present invention. FIG. 5B is a cross-sectional view taken along a dashed dotted line X1-X2 in FIG. 5A, and FIG. 5C is a cross-sectional view taken along a dashed dotted line Y1-Y2 in FIG. 5A.

The transistor 160 includes the conductive film 104 a over the substrate 102, the insulating film 106 over the substrate 102 and the conductive film 104 a, the oxide semiconductor film 108 over the insulating film 106, the insulating film 114 over the oxide semiconductor film 108, the insulating film 116 over the insulating film 114, and the conductive films 112 a and 112 b functioning as source and drain electrodes electrically connected to the oxide semiconductor film 108. Over the transistor 160, specifically, over the conductive films 112 a and 112 b and the insulating film 116, the insulating film 118 is provided. The opening 142 b reaching the conductive film 112 b is provided in the insulating film 118, through which the conductive film 120 a electrically connected to the conductive film 112 b is provided. The insulating film 122 is provided over the insulating film 118 and the conductive film 120 a. Note that the insulating film 122 is formed so as to cover the end portion of the conductive film 120 a, and the conductive film 120 a includes a region not covered with the insulating film 122.

The insulating films 114 and 116 collectively function as a protective insulating film for the oxide semiconductor film 108. The insulating film 118 functions as a protective insulating film for the transistor 160. The insulating film 122 functions as a protective insulating film for the transistor 160 and a protective insulating film for the conductive film 120 a. The conductive film 120 a functions as a pixel electrode used for a display device. The insulating film 106 functions as a gate insulating film of the transistor 160.

The transistor 160 is different from the transistor 150 described above in the shapes of the insulating films 114 and 116. Specifically, the insulating films 114 and 116 of the transistor 160 have an island shape and are provided over a channel region of the oxide semiconductor film 108. The other components are the same as those of the transistor 150, and the effect similar to that in the case of the transistor 150 is obtained.

<Structure Example 6 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from those of the semiconductor devices described above, will be described with reference to FIGS. 6A to 6C. FIG. 6A is a top view of a transistor 170 that is a semiconductor device of one embodiment of the present invention. FIG. 6B is a cross-sectional view taken along a dashed dotted line X1-X2 in FIG. 6A, and FIG. 6C is a cross-sectional view taken along a dashed dotted line Y1-Y2 in FIG. 6A.

The transistor 170 includes the conductive film 104 a over the substrate 102, the insulating film 106 over the substrate 102 and the conductive film 104 a, the oxide semiconductor film 108 over the insulating film 106, the insulating film 114 over the oxide semiconductor film 108, the insulating film 116 over the insulating film 114, and the conductive films 112 a and 112 b functioning as source and drain electrodes electrically connected to the oxide semiconductor film 108. Over the transistor 170, specifically, over the conductive films 112 a and 112 b and the insulating film 116, the insulating film 118 is provided. The opening 142 a reaching the conductive film 112 b is provided in the insulating films 114, 116, and 118, through which the conductive film 120 a electrically connected to the conductive film 112 b is provided. The conductive film 120 b is formed over the insulating film 118 to overlap with the oxide semiconductor film 108. The insulating film 122 is provided over the insulating film 118 and the conductive films 120 a and 120 b. Note that the insulating film 122 is formed so as to cover the end portion of the conductive film 120 a, and the conductive film 120 a includes a region not covered with the insulating film 122.

The insulating films 114 and 116 collectively function as a protective insulating film for the oxide semiconductor film 108. The insulating film 118 functions as a protective insulating film for the transistor 170. The insulating film 122 functions as a protective insulating film for the transistor 170 and a protective insulating film for the conductive films 120 a and 120 b. The conductive film 120 a functions as a pixel electrode used for a display device. The insulating film 106 functions as a gate insulating film of the transistor 170.

The conductive film 104 a in the transistor 170 functions as a first gate electrode. The insulating film 106 in the transistor 170 functions as gate insulating film. The insulating films 114, 116, and 118 collectively function as a second gate insulating film of the transistor 170. The conductive film 120 b in the transistor 170 functions as a second gate electrode (also referred to as a back gate electrode).

As illustrated in FIG. 6C, the conductive film 120 b is connected to the conductive film 104 a functioning as a first gate electrode through openings 142 c and 142 d provided in the insulating films 106, 114, 116, and 118. Accordingly, the conductive film 120 b and the conductive film 104 a are supplied with the same potential.

Note that although the structure in which the openings 142 c and 142 d are provided so that the conductive film 120 b and the conductive film 104 a are connected to each other is described in this embodiment, one embodiment of the present invention is not limited thereto. For example, a structure in which only one of the openings 142 c and 142 d is provided so that the conductive film 120 b and the conductive film 104 a are connected to each other, or a structure in which the openings 142 c and 142 d are not provided and the conductive film 120 b and the conductive film 104 a are not connected to each other may be employed. Note that in the case where the conductive film 120 b and the conductive film 104 a are not connected to each other, it is possible to apply different potentials to the conductive film 120 b and the conductive film 104 a.

As illustrated in FIG. 6B, the oxide semiconductor film 108 is positioned to face each of the conductive film 104 a functioning as a first gate electrode and the conductive film 120 b functioning as a second gate electrode, and is sandwiched between the two conductive films functioning as gate electrodes. The lengths in the channel length direction and the channel width direction of the conductive film 120 b functioning as a second gate electrode are longer than those in the channel length direction and the channel width direction of the oxide semiconductor film 108. The whole oxide semiconductor film 108 is covered with the conductive film 120 b with the insulating films 114, 116, and 118 positioned therebetween. Since the conductive film 120 b functioning as a second gate electrode is connected to the conductive film 104 a functioning as a first gate electrode through the opening 142 c and 142 d provided in the insulating films 106, 114, 116, and 118, a side surface of the oxide semiconductor film 108 in the channel width direction faces the conductive film 120 b functioning as a second gate electrode with the insulating films 114, 116, and 118 positioned therebetween.

In other words, in the channel width direction of the transistor 170, the conductive film 104 a functioning as a first gate electrode and the conductive film 120 b functioning as a second gate electrode are connected to each other through the openings provided in the insulating film 106 functioning as a first gate insulating film, and the insulating films 114, 116, and 118 collectively functioning as a second gate insulating film; and the conductive film 104 a and the conductive film 120 b surround the oxide semiconductor film 108 with the insulating film 106 functioning as a first gate insulating film, and the insulating films 114, 116, and 118 collectively functioning as a second gate insulating film positioned therebetween.

Such a structure makes it possible that the oxide semiconductor film 108 included in the transistor 170 is electrically surrounded by electric fields of the conductive film 104 a functioning as a first gate electrode and the conductive film 120 b functioning as a second gate electrode. A device structure of a transistor, like that of the transistor 170, in which electric fields of a first gate electrode and a second gate electrode electrically surround an oxide semiconductor film where a channel region is formed can be referred to as a surrounded channel (s-channel) structure.

Since the transistor 170 has the s-channel structure, an electric field for inducing a channel can be effectively applied to the oxide semiconductor film 108 by the conductive film 104 a functioning as a first gate electrode; therefore, the current drive capability of the transistor 170 can be improved and high on-state current characteristics can be obtained. Since the on-state current can be increased, it is possible to reduce the size of the transistor 170. In addition, since the transistor 170 is surrounded by the conductive film 104 a functioning as a first gate electrode and the conductive film 120 b functioning as a second gate electrode, the mechanical strength of the transistor 170 can be increased.

<Structure Example 7 of Semiconductor Device>

Next, a structure example of a semiconductor device, which is different from those of the semiconductor devices described above, will be described with reference to FIGS. 7A to 7D. FIGS. 7A and 7B each illustrate a cross-sectional view of a modification example of the transistor 100 in FIGS. 3B and 3C. FIGS. 7C and 7D each illustrate a cross-sectional view of another modification example of the transistor 100 in FIGS. 3B and 3C. Note that top views of the transistors illustrated in FIGS. 7A to 7D are omitted here because they are similar to the top view of FIG. 3A.

A transistor 100A illustrated in FIGS. 7A and 7B has the same structure as the transistor 100 illustrated in FIGS. 3B and 3C except that the oxide semiconductor film 108 has a three-layer structure. Specifically, the oxide semiconductor film 108 of the transistor 100A includes an oxide semiconductor film 108 a, an oxide semiconductor film 108 b, and an oxide semiconductor film 108 c.

A transistor 100B illustrated in FIG. 7C and 7D has the same structure as the transistor 100 in FIGS. 3B and 3C except that the oxide semiconductor film 108 has a two-layer structure. Specifically, the oxide semiconductor film 108 of the transistor 100B includes the oxide semiconductor film 108 a and the oxide semiconductor film 108 b.

Here, a band structure including the oxide semiconductor films 108 a, 108 b, and 108 c and insulating films in contact with the oxide semiconductor film 108 is described with reference to FIGS. 8A and 8B.

FIG. 8A shows an example of a band structure in the thickness direction of a stack of the insulating film 106 b, the oxide semiconductor films 108 a, 108 b, and 108 c, and the insulating film 114. FIG. 8B shows an example of a band structure in the thickness direction of a stack of the insulating film 106 b, the oxide semiconductor films 108 a and 108 b, and the insulating film 114. For easy understanding, the energy level of the conduction band minimum (Ec) of each of the insulating film 106 b, the oxide semiconductor films 108 a, 108 b, and 108 c, and the insulating film 114 is shown in the band structures.

In FIG. 8A, a silicon oxide film is used as each of the insulating films 106 b and 114, an oxide semiconductor film formed using a metal oxide target having an atomic ratio of metal elements of In:Ga:Zn=1:1:1 is used as the oxide semiconductor film 108 a, an oxide semiconductor film formed using a metal oxide target having an atomic ratio of metal elements of In:Ga:Zn=1:4:5 is used as the oxide semiconductor film 108 b, and an oxide semiconductor film formed using a metal oxide target having an atomic ratio of metal elements of In:Ga:Zn=1:3:6 is used as the oxide semiconductor film 108 c.

In the band structure of FIG. 8B, a silicon oxide film is used as each of the insulating films 106 b and 114, an oxide semiconductor film formed using a metal oxide target having an atomic ratio of metal elements of In:Ga:Zn=1:1:1 is used as the oxide semiconductor film 108 a, and a metal oxide film formed using a metal oxide target having an atomic ratio of metal elements of In:Ga:Zn=1:3:6 is used as the oxide semiconductor film 108 b.

As illustrated in FIGS. 8A and 8B, the energy level of the conduction band minimum smoothly varies between the oxide semiconductor film 108 a and the oxide semiconductor film 108 b. In other words, the conduction band minimum is continuously varied or a continuous junction is formed. To obtain such a band structure, there exist no impurity, which forms a defect state such as a trap center or a recombination center for the oxide semiconductor, at the interface between the oxide semiconductor film 108 a and the oxide semiconductor film 108 b.

To form a continuous junction between the oxide semiconductor film 108 a and the oxide semiconductor film 108 b, it is necessary to form the films successively without exposure to the air by using a multi-chamber deposition apparatus (sputtering apparatus) provided with a load lock chamber.

With the band structure of FIG. 8A or FIG. 8B, the oxide semiconductor film 108 a serves as a well, and a channel region is formed in the oxide semiconductor film 108 a in the transistor with the above stacked-layer structure.

By providing the oxide semiconductor film 108 b and/or the oxide semiconductor film 108 c, the oxide semiconductor film 108 a can be distanced away from trap states.

In addition, the trap states might be more distant from the vacuum level than the energy level of the conduction band minimum (Ec) of the oxide semiconductor film 108 a functioning as a channel region, so that electrons are likely to be accumulated in the trap states. When the electrons are accumulated in the trap states, the electrons become negative fixed electric charge, so that the threshold voltage of the transistor is shifted in the positive direction. Therefore, it is preferable that the trap states be closer to the vacuum level than the energy level of the conduction band minimum (Ec) of the oxide semiconductor film 108 a. Such a structure inhibits accumulation of electrons in the trap states. As a result, the on-state current and the field-effect mobility of the transistor can be increased.

In FIGS. 8A and 8B, the energy level of the conduction band minimum of each of the oxide semiconductor films 108 b and 108 c is closer to the vacuum level than that of the oxide semiconductor film 108 a. Typically, an energy difference between the conduction band minimum of the oxide semiconductor film 108 a and the conduction band minimum of each of the oxide semiconductor films 108 b and 108 c is greater than or equal to 0.15 eV or greater than or equal to 0.5 eV, and less than or equal to 2 eV or less than or equal to 1 eV. That is, the difference between the electron affinity of each of the oxide semiconductor films 108 b and 108 c and the electron affinity of the oxide semiconductor film 108 a is greater than or equal to 0.15 eV or greater than or equal to 0.5 eV, and less than or equal to 2 eV or less than or equal to 1 eV.

In such a structure, the oxide semiconductor film 108 a serves as a main path of current and functions as a channel region. In addition, since the oxide semiconductor films 108 b and 108 c each include one or more metal elements included in the oxide semiconductor film 108 a in which a channel region is formed, interface scattering is less likely to occur at the interface between the oxide semiconductor film 108 a and the oxide semiconductor film 108 b. Thus, the transistor can have high field-effect mobility because the movement of carriers is not hindered at the interface.

To prevent each of the oxide semiconductor films 108 b and 108 c from functioning as part of a channel region, a material having sufficiently low conductivity is used for the oxide semiconductor films 108 b and 108 c. Alternatively, a material which has a smaller electron affinity (a difference in energy level between the vacuum level and the energy level of the conduction band minimum) than the oxide semiconductor film 108 a and has a difference in the energy level of the conduction band minimum from the oxide semiconductor film 108 a (band offset) is used for the oxide semiconductor films 108 b and 108 c. Furthermore, to inhibit generation of a difference between threshold voltages due to the value of the drain voltage, it is preferable to form the oxide semiconductor films 108 b and 108 c using a material whose energy level of the conduction band minimum is closer to the vacuum level than that of the oxide semiconductor film 108 a by 0.2 eV or more, preferably 0.5 eV or more.

It is preferable that the oxide semiconductor films 108 b and 108 c not have a spinel crystal structure. This is because if the oxide semiconductor films 108 b and 108 c have a spinel crystal structure, components of the conductive films 112 a and 112 b might be diffused into the oxide semiconductor film 108 a at the interface between the spinel crystal structure and another region. Note that each of the oxide semiconductor films 108 b and 108 c is preferably a CAAC-OS, which is described later, in which case a higher blocking property against components of the conductive films 112 a and 112 b, e.g., copper elements, is obtained.

The thickness of each of the oxide semiconductor films 108 b and 108 c is greater than or equal to a thickness that is capable of inhibiting diffusion of the components of the conductive films 112 a and 112 b into the oxide semiconductor film 108 a, and less than a thickness that inhibits supply of oxygen from the insulating film 114 to the oxide semiconductor film 108 a. For example, when the thickness of each of the oxide semiconductor films 108 b and 108 c is greater than or equal to 10 nm, the components of the conductive films 112 a and 112 b can be prevented from diffusing into the oxide semiconductor film 108 a. When the thickness of each of the oxide semiconductor films 108 b and 108 c is less than or equal to 100 nm, oxygen can be effectively supplied from the insulating films 114 and 116 to the oxide semiconductor film 108 a.

When the oxide semiconductor films 108 b and 108 c are each an In—M—Zn oxide in which the atomic ratio of the element M (M is Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf) is higher than that of In, the energy gap of each of the oxide semiconductor films 108 b and 108 c can be large and the electron affinity thereof can be small. Therefore, a difference in electron affinity between the oxide semiconductor film 108 a and each of the oxide semiconductor films 108 b and 108 c may be controlled by the proportion of the element M. Furthermore, an oxygen vacancy is less likely to be generated in the oxide semiconductor film in which the atomic ratio of Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf is higher than that of In because Ti, Ga, Y, Zr, La, Ce, Nd, Sn, and Hf each are a metal element that is strongly bonded to oxygen.

When an In—M—Zn oxide is used for the oxide semiconductor films 108 b and 108 c, the proportions of In and M, not taking Zn and O into consideration, is preferably as follows: the atomic percentage of In is less than 50 atomic % and the atomic percentage of M is greater than or equal to 50 atomic %; further preferably, the atomic percentage of In is less than 25 atomic % and the atomic percentage of M is greater than or equal to 75 atomic %. Alternatively, a gallium oxide film may be used as each of the oxide semiconductor films 108 b and 108 c.

Furthermore, in the case where each of the oxide semiconductor films 108 a, 108 b, and 108 c is an In—M—Zn oxide, the proportion of M atoms in each of the oxide semiconductor films 108 b and 108 c is higher than that in the oxide semiconductor film 108 a. Typically, the proportion of M in each of the oxide semiconductor films 108 b and 108 c is 1.5 or more times, preferably twice or more, or further preferably three or more times as high as that in the oxide semiconductor film 108 a.

Furthermore, in the case where the oxide semiconductor films 108 a, 108 b, and 108 c are each an In—M—Zn oxide, when the oxide semiconductor film 108 a has an atomic ratio of In:M:Zn=x₁:y₁:z₁ and the oxide semiconductor films 108 b and 108 c each have an atomic ratio of In:M:Zn=x₂:y₂:z₂, y₂/x₂ is larger than y₁/x₁, preferably y₂/x₂ is 1.5 or more times as large as y₁/x₁, further preferably, y₂/x₂ is two or more times as large as y₁/x₁, or still further preferably y₂/x₂ is three or more times or four or more times as large as y₁/x₁. At this time, y₁ is preferably greater than or equal to x₁ in the oxide semiconductor film 108 a, because stable electrical characteristics of the transistor can be achieved. However, when y₁ is three or more times as large as x₁, the field-effect mobility of the transistor including the oxide semiconductor film 108 a is reduced. Accordingly, y₁ is preferably smaller than three times x₁.

In the case where the oxide semiconductor film 108 a is an In—M—Zn oxide and a target having the atomic ratio of metal elements of In:M:Zn=x₁:y₁:z₁ is used for depositing the oxide semiconductor film 108 a, x₁/y₁ is preferably greater than or equal to 1/3 and less than or equal to 6, further preferably greater than or equal to 1 and less than or equal to 6, and z₁/y₁ is preferably greater than or equal to 1/3 and less than or equal to 6, further preferably greater than or equal to 1 and less than or equal to 6. Note that when z₁/y₁ is greater than or equal to 1 and less than or equal to 6, a CAAC-OS to be described later is easily formed as the oxide semiconductor film 108 a. Typical examples of the atomic ratio of the metal elements of the target are In:M:Zn=1:1:1 and In:M:Zn=3:1:2.

In the case where the oxide semiconductor films 108 b and 108 c are each an In—M—Zn oxide and a target having an atomic ratio of metal elements of InM:Zn=x₂:y₂:z₂ is used for depositing the oxide semiconductor films 108 _(b) and 108 _(c,) x₂/y₂ is preferably less than x₁/y₁, and z₂/y₂ is preferably greater than or equal to 1/3 and less than or equal to 6, further preferably greater than or equal to 1 and less than or equal to 6. When the atomic ratio of M with respect to indium is high, the energy gap of the oxide semiconductor films 108 b and 108 c can be large and the electron affinity thereof can be small; therefore, y₂/x₂ is preferably higher than or equal to 3 or higher than or equal to 4. Typical examples of the atomic ratio of the metal elements of the target include In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:5, In:M:Zn=1:3:6, In:M:Zn=1:4:2, In:M:Zn=1:4:4, In:M:Zn=1:4:5, and In:M:Zn=1:5:5.

Furthermore, in the case where the oxide semiconductor films 108 b and 108 c are each an In-M oxide, when a divalent metal element (e.g., zinc) is not included as M, the oxide semiconductor films 108 b and 108 c which do not include a spinel crystal structure can be formed. As the oxide semiconductor films 108 b and 108 c, for example, an In—Ga oxide film can be used. The In—Ga oxide can be formed by a sputtering method using an In—Ga metal oxide target (In:Ga=7:93), for example. To deposit the oxide semiconductor films 108 b and 108 c by a sputtering method using DC discharge, on the assumption that an atomic ratio of In:M is x:y, it is preferable that y/(x+y) be less than or equal to 0.96, or further preferably less than or equal to 0.95, for example, 0.93.

In each of the oxide semiconductor films 108 a, 108 b, and 108 c, the proportions of the atoms in the above atomic ratio vary within a range of ±40% as an error.

The structures of the transistors of this embodiment can be freely combined with each other.

<Method 1 for Manufacturing Semiconductor Device>

Next, a method for manufacturing a semiconductor device of one embodiment of the present invention is described below in detail with reference to FIGS. 9A to 9C, FIGS. 10A and 10B, FIGS. 11A and 11B, and FIGS. 12A and 12B.

Note that as the semiconductor device of one embodiment of the present invention, the semiconductor device in FIGS. 1A and 1B and the transistor 100 in FIGS. 3A to 3C can be formed in the same process. Therefore, the manufacturing method in FIGS. 9A to 9C, FIGS. 10A and 10B, FIGS. 11A and 11B, and FIGS. 12A and 12B illustrates both a manufacturing method of the semiconductor device in FIGS. 1A and 1B and that of the transistor 100 in FIGS. 3A to 3C.

Note that the films included in the semiconductor device (i.e., the insulating film, the oxide semiconductor film, the conductive film, and the like) can be formed by any of a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, and a pulsed laser deposition (PLD) method. Alternatively, a coating method or a printing method can be used. Although the sputtering method and a PECVD method are typical examples of the film formation method, a thermal CVD method may be used. As the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method or an atomic layer deposition (ALD) method may be used, for example.

Deposition by the thermal CVD method may be performed in such a manner that the pressure in a chamber is set to an atmospheric pressure or a reduced pressure, and a source gas and an oxidizer are supplied to the chamber at a time and react with each other in the vicinity of the substrate or over the substrate. Thus, no plasma is generated in the deposition; therefore, the thermal CVD method has an advantage that no defect due to plasma damage is caused.

Deposition by the ALD method may be performed in such a manner that the pressure in a chamber is set to an atmospheric pressure or a reduced pressure, source gases for reaction are sequentially introduced into the chamber, and then the sequence of the gas introduction is repeated. For example, two or more kinds of source gases are sequentially supplied to the chamber by switching switching valves (also referred to as high-speed valves). In such a case, a first source gas is introduced, an inert gas (e.g., argon or nitrogen) or the like is introduced at the same time as or after introduction of the first gas so that the source gases are not mixed, and then a second source gas is introduced. Note that in the case where the first source gas and the inert gas are introduced at a time, the inert gas serves as a carrier gas, and the inert gas may also be introduced at the same time as the introduction of the second source gas. Alternatively, the first source gas may be exhausted by vacuum evacuation instead of the introduction of the inert gas, and then the second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first single-atomic layer; then the second source gas is introduced to react with the first single-atomic layer; as a result, a second single-atomic layer is stacked over the first single-atomic layer, so that a thin film is formed.

The sequence of the gas introduction is repeated plural times until a desired thickness is obtained, whereby a thin film with excellent step coverage can be formed. The thickness of the thin film can be adjusted by the number of repetition times of the sequence of the gas introduction; therefore, an ALD method makes it possible to accurately adjust a thickness and thus is suitable for manufacturing a minute transistor.

First, a conductive film is formed over the substrate 102 and processed through a lithography process and an etching process, whereby the conductive film 104 and the conductive film 104 a functioning as a gate electrode of the transistor 100 are formed. Then, the insulating films 106 a and 106 b are formed over the conductive films 104 and 104 a (see FIG. 9A).

The conductive film 104 and the conductive film 104 a functioning as a gate electrode can be formed by a sputtering method, a CVD method, a vacuum evaporation method, or a PLD method. Alternatively, a coating method or a printing method can be used. Although typical deposition methods are a sputtering method and PECVD method, a thermal CVD method, such as an MOCVD method, or an ALD method described above may be used.

In this embodiment, a glass substrate is used as the substrate 102, and as the conductive film 104 and the conductive film 104a functioning as a gate electrode, a 100-nm-thick tungsten film is formed by a sputtering method.

The insulating films 106 a and 106 b can be formed by a sputtering method, a PECVD method, a thermal CVD method, a vacuum evaporation method, a PLD method, or the like. In this embodiment, a 400-nm-thick silicon nitride film as the insulating film 106 a and a 50-nm-thick silicon oxynitride film as the insulating film 106 b are formed by a PECVD method.

Note that the insulating film 106 a can have a stacked-layer structure of silicon nitride films. Specifically, the insulating film 106 a can have a three-layer structure of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. An example of the three-layer structure is as follows.

For example, the first silicon nitride film can be formed to have a thickness of 50 nm under the condition where silane at a flow rate of 200 sccm, nitrogen at a flow rate of 2000 sccm, and an ammonia gas at a flow rate of 100 sccm are supplied as a source gas to a reaction chamber of a PECVD apparatus; the pressure in the reaction chamber is controlled to 100 Pa, and a power of 2000 W is supplied using a 27.12 MHz high-frequency power source.

The second silicon nitride film can be formed to have a thickness of 300 nm under the condition where silane at a flow rate of 200 sccm, nitrogen at a flow rate of 2000 sccm, and an ammonia gas at a flow rate of 2000 sccm are supplied as a source gas to the reaction chamber of the PECVD apparatus; the pressure in the reaction chamber is controlled to 100 Pa, and a power of 2000 W is supplied using a 27.12 MHz high-frequency power source.

The third silicon nitride film can be formed to have a thickness of 50 nm under the condition where silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm are supplied as a source gas to the reaction chamber of the PECVD apparatus; the pressure in the reaction chamber is controlled to 100 Pa, and a power of 2000 W is supplied using a 27.12 MHz high-frequency power source.

Note that the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film can be each formed at a substrate temperature of 350° C.

When the insulating film 106 a has the three-layer structure of silicon nitride films, for example, in the case where a conductive film including Cu is used as the conductive films 104 and 104 a, the following effect can be obtained.

The first silicon nitride film can inhibit diffusion of a copper (Cu) element from the conductive films 104 and 104 a. The second silicon nitride film has a function of releasing hydrogen and can improve withstand voltage of the insulating film functioning as a gate insulating film. The third silicon nitride film releases a small amount of hydrogen and can inhibit diffusion of hydrogen released from the second silicon nitride film.

The insulating film 106 b is preferably an insulating film containing oxygen to improve characteristics of an interface with the oxide semiconductor film 108 formed later.

Next, the oxide semiconductor film 108 is formed over the insulating film 106 b (see FIG. 9B).

In this embodiment, an oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn metal oxide target (having an atomic ratio of In:Ga:Zn=1:1:1.2), a mask is formed over the oxide semiconductor film through a lithography process, and the oxide semiconductor film is processed into a desired shape, whereby the oxide semiconductor film 108 having an island shape is formed.

After the oxide semiconductor film 108 is formed, heat treatment may be performed at a temperature higher than or equal to 150° C. and lower than the strain point of the substrate, preferably higher than or equal to 200° C. and lower than or equal to 450° C., or further preferably higher than or equal to 300° C. and lower than or equal to 450° C. The heat treatment performed here serves as one kind of treatment for increasing the purity of the oxide semiconductor film and can reduce hydrogen, water, and the like contained in the oxide semiconductor film 108. Note that the heat treatment for the purpose of reducing hydrogen, water, and the like may be performed before the oxide semiconductor film 108 is processed into an island shape.

An electric furnace, an RTA apparatus, or the like can be used for the heat treatment performed on the oxide semiconductor film 108. With the use of an RTA apparatus, the heat treatment can be performed at a temperature higher than or equal to the strain point of the substrate if the heating time is short. Therefore, the heat treatment time can be shortened.

Note that the heat treatment performed on the oxide semiconductor film 108 may be performed under an atmosphere of nitrogen, oxygen, ultra-dry air (air in which a water content is 20 ppm or less, preferably 1 ppm or less, or further preferably 10 ppb or less), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, ultra-dry air, or a rare gas preferably does not contain hydrogen, water, and the like. Furthermore, after heat treatment performed in a nitrogen atmosphere or a rare gas atmosphere, heat treatment may be additionally performed in an oxygen atmosphere or an ultra-dry air atmosphere. As a result, hydrogen, water, and the like can be released from the oxide semiconductor film and oxygen can be supplied to the oxide semiconductor film at the same time. Consequently, the number of oxygen vacancies in the oxide semiconductor film can be reduced.

In the case where the oxide semiconductor film 108 is formed by a sputtering method, as a sputtering gas, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen is used as appropriate. In the case of using the mixed gas of a rare gas and oxygen, the proportion of oxygen to a rare gas is preferably increased. In addition, increasing the purity of a sputtering gas is necessary. For example, as an oxygen gas or an argon gas used for a sputtering gas, a gas which is highly purified to have a dew point of −40° C. or lower, preferably −80° C. or lower, further preferably −100° C. or lower, or still further preferably −120° C. or lower is used, whereby entry of moisture or the like into the oxide semiconductor film 108 can be minimized.

In the case where the oxide semiconductor film 108 is formed by a sputtering method, a chamber in a sputtering apparatus is preferably evacuated to be a high vacuum state (to the degree of about 5×10⁻⁷ Pa to 1×10⁻⁴ Pa) with an adsorption vacuum evacuation pump such as a cryopump in order to remove water or the like, which serves as an impurity for the oxide semiconductor film 108, as much as possible. Alternatively, a turbo molecular pump and a cold trap are preferably combined so as to prevent a backflow of a gas, especially a gas including carbon or hydrogen from an exhaust system to the inside of the chamber.

Next, the conductive film 112 is formed over the insulating film 106 b and the conductive films 112 a and 112 b functioning as a source electrode and a drain electrode are formed over the insulating film 106 b and the oxide semiconductor film 108 (see FIG. 9C).

In this embodiment, the conductive film 112 and the conductive films 112 a and 112 b are formed in the following manner: a stack formed of a 50-nm-thick tungsten film and a 400-nm-thick aluminum film is formed by a sputtering method, a mask is formed over the stack through a lithography process, and the stack is processed into desired shapes. Although the conductive film 112 and the conductive films 112 a and 112 b each have a two-layer structure in this embodiment, one embodiment of the present invention is not limited thereto. For example, the conductive film 112 and the conductive films 112 a and 112 b each may have a three-layer structure formed of a 50-nm-thick tungsten film, a 400-nm-thick aluminum film, and a 100-nm-thick titanium film.

After the conductive film 112 and the conductive films 112 a and 112 b are formed, a surface of the oxide semiconductor film 108 (on a back channel side) may be cleaned. The cleaning may be performed, for example, using a chemical solution such as phosphoric acid. The cleaning using a chemical solution such as a phosphoric acid can remove impurities (e.g., an element included in the conductive film 112 and the conductive films 112 a and 112 b) attached to the surface of the oxide semiconductor film 108.

Note that a recessed portion might be formed in part of the oxide semiconductor film 108 at the step of forming the conductive film 112 and the conductive films 112 a and 112 b and/or the cleaning step.

Through the steps, the transistor 100 is formed.

Next, the insulating films 114 and 116 are formed over the insulating film 106 b and the conductive film 112 and over the oxide semiconductor film 108 and the conductive films 112 a and 112 b (see FIG. 10A).

Note that after the insulating film 114 is formed, the insulating film 116 is preferably formed in succession without exposure to the air. After the insulating film 114 is formed, the insulating film 116 is formed in succession by adjusting at least one of the flow rate of a source gas, pressure, a high-frequency power, and a substrate temperature without exposure to the air, whereby the concentration of impurities attributed to the atmospheric component at the interface between the insulating film 114 and the insulating film 116 can be reduced and oxygen in the insulating films 114 and 116 can be moved to the oxide semiconductor film 108; accordingly, the number of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

For example, as the insulating film 114, a silicon oxynitride film can be formed by a PECVD method. In this case, a deposition gas containing silicon and an oxidizing gas are preferably used as a source gas. Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, and silane fluoride. Examples of the oxidizing gas include dinitrogen monoxide and nitrogen dioxide. An insulating film containing nitrogen and having a small number of defects can be formed as the insulating film 114 by a PECVD method under the conditions where the ratio of the oxidizing gas to the deposition gas is higher than 20 times and lower than 100 times, or preferably higher than or equal to 40 times and lower than or equal to 80 times and the pressure in a treatment chamber is lower than 100 Pa, or preferably lower than or equal to 50 Pa.

In this embodiment, a silicon oxynitride film is formed as the insulating film 114 by a PECVD method under the conditions where the substrate 102 is held at a temperature of 220° C., silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm are used as a source gas, the pressure in the treatment chamber is 20 Pa, and a high-frequency power of 100 W at 13.56 MHz (1.6×10⁻² W/cm² as the power density) is supplied to parallel-plate electrodes.

As the insulating film 116, a silicon oxide film or a silicon oxynitride film is formed under the conditions where the substrate placed in a treatment chamber of the PECVD apparatus that is vacuum-evacuated is held at a temperature higher than or equal to 180° C. and lower than or equal to 280° C., or preferably higher than or equal to 200° C. and lower than or equal to 240° C., the pressure is greater than or equal to 100 Pa and less than or equal to 250 Pa, or preferably greater than or equal to 100 Pa and less than or equal to 200 Pa with introduction of a source gas into the treatment chamber, and a high-frequency power of greater than or equal to 0.17 W/cm² and less than or equal to 0.5 W/cm², or preferably greater than or equal to 0.25 W/cm² and less than or equal to 0.35 W/cm² is supplied to an electrode provided in the treatment chamber.

As the deposition conditions of the insulating film 116, the high-frequency power having the above power density is supplied to a reaction chamber having the above pressure, whereby the degradation efficiency of the source gas in plasma is increased, oxygen radicals are increased, and oxidation of the source gas is promoted; thus, the oxygen content in the insulating film 116 becomes higher than that in the stoichiometric composition. On the other hand, in the film formed at a substrate temperature within the above temperature range, the bond between silicon and oxygen is weak, and accordingly, part of oxygen in the film is released by heat treatment in a later step. Thus, it is possible to form an oxide insulating film which contains oxygen in excess of that in the stoichiometric composition and from which part of oxygen is released by heating.

Note that the insulating film 114 functions as a protective film for the oxide semiconductor film 108 in the step of forming the insulating film 116. Therefore, the insulating film 116 can be formed using the high-frequency power having a high power density while damage to the oxide semiconductor film 108 is reduced.

Note that in the deposition conditions of the insulating film 116, when the flow rate of the deposition gas containing silicon with respect to the oxidizing gas is increased, the number of defects in the insulating film 116 can be reduced. Typically, it is possible to form an oxide insulating layer in which the number of defects is small, i.e., the spin density of a signal that appears at g=2.001 originating from a dangling bond of silicon is lower than 6×10¹⁷ spins/cm³, preferably lower than or equal to 3×10¹⁷ spins/cm³, or further preferably lower than or equal to 1.5×10¹⁷ spins/cm³ by ESR measurement. As a result, the reliability of the transistor can be improved.

Heat treatment may be performed after the insulating films 114 and 116 are formed. The heat treatment can reduce nitrogen oxide contained in the insulating films 114 and 116. By the heat treatment, part of oxygen contained in the insulating films 114 and 116 can be moved to the oxide semiconductor film 108, so that the number of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

The temperature of the heat treatment performed on the insulating films 114 and 116 is typically higher than or equal to 150° C. and lower than or equal to 400° C., preferably higher than or equal to 300° C. and lower than or equal to 400° C., or further preferably higher than or equal to 320° C. and lower than or equal to 370° C. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, ultra-dry air (air in which a water content is 20 ppm or less, preferably 1 ppm or less, or further preferably 10 ppb or less), or a rare gas (argon, helium, or the like). Note that an electric furnace, an RTA apparatus, or the like can be used for the heat treatment, in which it is preferable that hydrogen, water, and the like not be contained in the nitrogen, oxygen, ultra-dry air, or rare gas.

In this embodiment, the heat treatment is performed at 350° C. in an atmosphere of nitrogen and oxygen for 1 hour.

Next, a protective film 130 that inhibits release of oxygen is formed over the insulating film 116. Then, oxygen 141 is added to the insulating films 114 and 116 and the oxide semiconductor film 108 through the protective film 130 (see FIG. 10B).

The protective film 130 that inhibits release of oxygen contains at least one of indium, zinc, titanium, aluminum, tungsten, tantalum, and molybdenum. For example, a conductive material such as an alloy containing any of the metal elements, an alloy containing any of the metal elements in combination, a metal oxide containing any of the metal elements, a metal nitride containing any of the metal elements, or a metal nitride oxide containing any of the metal elements is used.

The protective film 130 that inhibits release of oxygen can be formed using, for example, a tantalum nitride film, a titanium film, an indium tin oxide (ITO) film, an aluminum film, or an oxide semiconductor film (e.g., an IGZO film having an atomic ratio of In:Ga:Zn=1:4:5).

The thickness of the protective film 130 that inhibits release of oxygen can be greater than or equal to 1 nm and less than or equal to 20 nm, or greater than or equal to 2 nm and less than or equal to 10 nm. In this embodiment, a 5-nm-thick tantalum nitride film is used as the protective film 130.

As a method for adding the oxygen 141 to the insulating films 114 and 116 and the oxide semiconductor film 108 through the protective film 130, an ion doping method, an ion implantation method, plasma treatment, or the like is given. When the protective film 130 is provided over the insulating film 116 and then oxygen is added, the protective film 130 serves as a protective film for inhibiting oxygen from being released from the insulating film 116. Thus, a larger amount of oxygen can be added to the insulating films 114 and 116 and the oxide semiconductor film 108. Note that in the case where the insulating films 114 and 116 and the oxide semiconductor film 108 after deposition contain oxygen in excess of that in the stoichiometric composition, the oxygen 141 is not necessarily added to the insulating films 114 and 116 and the oxide semiconductor film 108.

In the case where oxygen is introduced by plasma treatment, by making oxygen excited by a microwave to generate high density oxygen plasma, the amount of oxygen introduced into the insulating film 116 can be increased.

After that, the protective film 130 is removed, and the insulating film 118 is formed over the insulating film 116 (see FIG. 11A).

Note that by the addition of the oxygen 141, the protective film 130 becomes the insulating film formed of oxide or nitride of metal (indium, zinc, titanium, aluminum, tungsten, tantalum, or molybdenum). Although the method for forming the insulating film 118 after removal of the protective film 130 is described as an example in this embodiment, without limitation thereto, the insulating film 118 may be formed over the protective film 130 without removal of the protective film 130.

Note that heat treatment may be performed before or after the formation of the insulating film 118, so that excess oxygen contained in the insulating films 114 and 116 can be diffused into the oxide semiconductor film 108 to fill an oxygen vacancy in the oxide semiconductor film 108. Alternatively, the insulating film 118 may be deposited by heating, so that excess oxygen contained in the insulating films 114 and 116 can be diffused into the oxide semiconductor film 108 to fill an oxygen vacancy in the oxide semiconductor film 108.

In the case where the insulating film 118 is formed by a PECVD method, the substrate temperature is preferably set to higher than or equal to 300° C. and lower than or equal to 400° C., or further preferably higher than or equal to 320° C. and lower than or equal to 370° C., so that a dense film can be formed.

For example, in the case where a silicon nitride film is formed by a PECVD method as the insulating film 118, a deposition gas containing silicon, nitrogen, and ammonia are preferably used as a source gas. A small amount of ammonia compared to the amount of nitrogen is used, whereby ammonia is dissociated in the plasma and activated species are generated. The activated species cleave a bond between silicon and hydrogen which are included in a deposition gas containing silicon and a triple bond between nitrogen molecules. As a result, a dense silicon nitride film having few defects, in which bonds between silicon and nitrogen are promoted and bonds between silicon and hydrogen is few, can be formed. On the other hand, when the amount of ammonia with respect to nitrogen is large, decomposition of a deposition gas containing silicon and decomposition of nitrogen are not promoted, so that a sparse silicon nitride film in which bonds between silicon and hydrogen remain and defects are increased is formed. Therefore, in the source gas, a flow rate ratio of the nitrogen to the ammonia is set to be greater than or equal to 5 and less than or equal to 50, or preferably greater than or equal to 10 and less than or equal to 50.

In this embodiment, with the use of a PECVD apparatus, a 50-nm-thick silicon nitride film is formed as the insulating film 118 using silane, nitrogen, and ammonia as a source gas. The flow rate of silane is 50 sccm, the flow rate of nitrogen is 5000 sccm, and the flow rate of ammonia is 100 sccm. The pressure in the treatment chamber is 100 Pa, the substrate temperature is 350° C., and high-frequency power of 1000 W is supplied to parallel-plate electrodes with a 27.12 MHz high-frequency power source. Note that the PECVD apparatus is a parallel-plate PECVD apparatus in which the electrode area is 6000 cm², and the power per unit area (power density) into which the supplied power is converted is 1.7×10⁻¹ W/cm².

Heat treatment may be performed after the formation of the insulating film 118. The heat treatment is performed typically at a temperature higher than or equal to 150° C. and lower than or equal to 400° C., preferably higher than or equal to 300° C. and lower than or equal to 400° C., or further preferably higher than or equal to 320° C. and lower than or equal to 370° C. When the heat treatment is performed, the amounts of hydrogen and water in the insulating films 114 and 116 are reduced and accordingly the generation of defects in the oxide semiconductor film 108 described above is inhibited.

Next, the opening 142 reaching the conductive film 104 is formed by partial removal of the insulating films 106 a and 106 b and the insulating films 114, 116, and 118. In addition, the opening 142 a reaching the conductive film 112 b is formed by partial removal of the insulating films 114, 116, and 118 (see FIG. 11B).

As a method for forming the openings 142 and 142 a, a mask is formed over the insulating film 118 through a lithography process, and desired regions of the insulating films 106 a and 106 b and the insulating films 114, 116, and 118 are processed. The openings 142 and 142 a may be formed using, for example, a gray-tone mask or a half-tone mask. Although the method for forming the openings 142 and 142 a in the same step is described as an example in this embodiment, without limitation thereto, the openings 142 and 142 a may be formed in different steps, for example.

Next, a conductive film is formed over the insulating film 118, the conductive film 104, and the conductive film 112 b so as to cover the openings 142 and 142 a, and the conductive film is processed into a desired shape, so that the conductive films 120 and 120 a are formed (see FIG. 12A).

For the conductive films 120 and 120 a, a light-transmitting conductive material such as indium oxide including tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added can be used. The conductive films 120 and 120 a can be formed by a sputtering method, for example. In this embodiment, a 110-nm-thick indium tin oxide film to which silicon oxide is added is formed with a sputtering apparatus.

Next, an insulating film is formed over the conductive films 120 and 120 a and is processed into a desired shape, so that the insulating film 122 is formed (see FIG. 12B).

In this embodiment, with the use of a PECVD apparatus, a 100-nm-thick silicon nitride film is formed as the insulating film 122 using silane and nitrogen as a source gas. The flow rate of silane is 200 sccm, and the flow rate of nitrogen is 5000 sccm. The pressure in the treatment chamber is 100 Pa, the substrate temperature is 350° C., and high-frequency power of 2000 W is supplied to parallel-plate electrodes with a 27.12 MHz high-frequency power source.

As described above, an ammonia gas is not used as a source gas for formation of the insulating film 122, whereby the amount of ammonia gas released from the insulating film 122 can be suppressed.

Through the above process, the semiconductor device illustrated in FIGS. 1A and 7B and FIGS. 3A to 3C can be manufactured.

<Method 2 for Manufacturing Semiconductor Device>

Next, a method for manufacturing the transistor 150 in FIGS. 4A to 4C that is a semiconductor device of one embodiment of the present invention is described below in detail with reference to FIGS. 13A to 13D, FIGS. 14A to 14C, and FIGS. 15A and 15B. Note that FIGS. 13A to 13D, FIGS. 14A to 14C, and FIGS. 15A and 15B are cross sectional views illustrating the manufacturing method of the transistor 150.

First, a step similar to the step in FIG. 9B is performed, and then the insulating films 114 and 116 and the protective film 130 that inhibits release of oxygen are formed over the oxide semiconductor film 108 (see FIG. 13A).

Next, the oxygen 141 is added to the insulating films 114 and 116 and the oxide semiconductor film 108 through the protective film 130 (see FIG. 13B).

Next, the protective film 130 is removed, so that the insulating film 116 is exposed (see FIG. 13C).

Next, a mask is formed over the insulating film 116 through a lithography process, and the openings 141 a and 141 b are formed in desired regions in the insulating films 114 and 116. Note that the openings 141 a and 141 b reach the oxide semiconductor film 108 (see FIG. 13D).

Next, a conductive film is formed over the oxide semiconductor film 108 and the insulating film 116 to cover the openings 141 a and 141 b, a mask is formed over the conductive film through a lithography process, and the conductive film is processed into desired shapes, whereby the conductive films 112 a and 112 b are formed (see FIG. 14A).

Next, the insulating film 118 is formed over the insulating film 116 and the conductive films 112 a and 112 b (see FIG. 14B).

Next, a mask is formed over the insulating film 118 through a lithography process, and the opening 142 b is formed in a desired region in the insulating film 118. Note that the opening 142 b reaches the conductive film 112 b (see FIG. 14C).

Next, a conductive film is formed over the insulating film 118 and the conductive film 112 b so as to cover the opening 142 b, and the conductive film is processed into a desired shape, so that the conductive film 120 a is formed (see FIG. 15A).

Next, an insulating film is formed over the insulating film 118 and the conductive film 120 a and is processed into a desired shape, so that the insulating film 122 is formed. Note that the insulating film 122 covers the end portion of the conductive film 120 a (see FIG. 15B).

Through the above process, the transistor 150 illustrated in FIGS. 4A to 4C can be manufactured.

Note that the transistor 160 in FIGS. 5A to 5C can be manufactured in such a manner that the insulating films 114 and 116 are processed into an island shape over a channel region of the oxide semiconductor film 108 at the formation of the openings 141 a and 141 b in FIG. 13D and then through the same steps as the transistor 150 in FIGS. 4A to 4C.

<Method 3 for Manufacturing Semiconductor Device>

Next, a method for manufacturing the transistor 170 that is a semiconductor device of one embodiment of the present invention is described below in detail with reference to FIGS. 16A to 16D and FIGS. 17A to 17D.

FIGS. 16A and 16C and FIGS. 17A and 17C are each a cross-sectional view of the manufacturing method in the channel length direction of the transistor 170 and FIGS. 16B and 16D and FIGS. 17B and 17D are each a cross-sectional view of the manufacturing method in the channel width direction of the transistor 170.

First, through a step similar to the step in FIG. 11A, the insulating film 118 is formed over the insulating film 116 (see FIGS. 16A and 16B).

Next, a mask is formed over the insulating film 118 through a lithography process, and the opening 142 a is formed in a desired region in the insulating films 114, 116, and 118. In addition, a mask is formed over the insulating film 118 through a lithography process, and the openings 142 c and 142 d are formed in desired regions in the insulating films 106 a, 106 b, 114, 116, and 118. Note that the opening 142 a reaches the conductive film 112 b. The openings 142 c and 142 d each reach the conductive film 104 a (see FIGS. 16C and 16D).

Note that the openings 142 c and 142 d and the opening 142 a may be formed at a time or may be formed by different steps. In the case where the openings 142 c and 142 d and the opening 142 a are formed at a time, for example, a gray-tone mask or a half-tone mask may be used.

Next, a conductive film is formed over the insulating film 118 so as to cover the openings 142 a, 142 c, and 142 d, and the conductive film is processed into a desired shape, so that the conductive film 120 a is formed (see FIGS. 17A and 17B).

Next, an insulating film is formed over the insulating film 118 and the conductive films 120 a and 120 b and is processed into a desired shape, so that the insulating film 122 is formed (see FIGS. 17C and 17D).

Through the above process, the transistor 170 illustrated in FIGS. 6A to 6C can be manufactured.

Embodiment 2

In this embodiment, the structure of an oxide semiconductor film included in a semiconductor device of one embodiment of the present invention will be described below in detail.

<Oxide Semiconductor Structure>

First, a structure of an oxide semiconductor is described.

An oxide semiconductor is classified into a single crystal oxide semiconductor and a non-single-crystal oxide semiconductor. Examples of a non-single-crystal oxide semiconductor include a c-axis aligned crystalline oxide semiconductor (CAAC-OS), a polycrystalline oxide semiconductor, a nanocrystalline oxide semiconductor (nc-OS), an amorphous-like oxide semiconductor (a-like OS), and an amorphous oxide semiconductor.

From another perspective, an oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. In addition, examples of a crystalline oxide semiconductor include a single crystal oxide semiconductor, a CAAC-OS, a polycrystalline oxide semiconductor, and an nc-OS.

It is known that an amorphous structure is generally defined as being metastable and unfixed, and being isotropic and having no non-uniform structure. In other words, an amorphous structure has a flexible bond angle and a short-range order but does not have a long-range order.

This means that an inherently stable oxide semiconductor cannot be regarded as a completely amorphous oxide semiconductor. Moreover, an oxide semiconductor that is not isotropic (e.g., an oxide semiconductor film that has a periodic structure in a microscopic region) cannot be regarded as a completely amorphous oxide semiconductor. Note that an a-like OS has a periodic structure in a microscopic region, but at the same time has a void and has an unstable structure. For this reason, an a-like OS has physical properties similar to those of an amorphous oxide semiconductor.

<CAAC-OS>

First, a CAAC-OS is described.

A CAAC-OS is one of oxide semiconductors having a plurality of c-axis aligned crystal parts (also referred to as pellets).

In a combined analysis image (also referred to as a high-resolution TEM image) of a bright-field image and a diffraction pattern of a CAAC-OS, which is obtained using a transmission electron microscope (TEM), a plurality of pellets can be observed. However, in the high-resolution TEM image, a boundary between pellets, that is, a grain boundary is not clearly observed. Thus, in the CAAC-OS, a reduction in electron mobility due to the grain boundary is less likely to occur.

The CAAC-OS observed with a TEM is described below. FIG. 18A shows a high-resolution TEM image of a cross section of the CAAC-OS which is observed from a direction substantially parallel to the sample surface. The high-resolution TEM image is obtained with a spherical aberration corrector function. The high-resolution TEM image obtained with a spherical aberration corrector function is particularly referred to as a Cs-corrected high-resolution TEM image. The Cs-corrected high-resolution TEM image can be obtained with, for example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd.

FIG. 18B is an enlarged Cs-corrected high-resolution TEM image of a region (1) in FIG. 18A. FIG. 18B shows that metal atoms are arranged in a layered manner in a pellet. Each metal atom layer has a configuration reflecting unevenness of a surface over which a CAAC-OS film is formed (hereinafter, the surface is referred to as a formation surface) or a top surface of the CAAC-OS, and is arranged parallel to the formation surface or the top surface of the CAAC-OS.

As shown in FIG. 18B, the CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is denoted by an auxiliary line in FIG. 18C. FIGS. 18B and 18C prove that the size of a pellet is approximately 1 nm to 3 nm, and the size of a space caused by tilt of the pellets is approximately 0.8 nm. Therefore, the pellet can also be referred to as a nanocrystal (nc). Furthermore, a CAAC-OS can be referred to as an oxide semiconductor including c-axis aligned nanocrystals (CANC).

Here, according to the Cs-corrected high-resolution TEM images, the schematic arrangement of pellets 5100 of a CAAC-OS over a substrate 5120 is illustrated by such a structure in which bricks or blocks are stacked (see FIG. 18D). The part in which the pellets are tilted as observed in FIG. 18C corresponds to a region 5161 shown in FIG. 18D.

FIG. 19A shows a Cs-corrected high-resolution TEM image of a plane of the CAAC-OS observed from a direction substantially perpendicular to the sample surface. FIGS. 19B, 19C, and 19D are enlarged Cs-corrected high-resolution TEM images of regions (1), (2), and (3) in FIG. 19A, respectively. FIGS. 19B, 19C, and 19D indicate that metal atoms are arranged in a triangular, quadrangular, or hexagonal configuration in a pellet. However, there is no regularity of arrangement of metal atoms between different pellets.

Next, a CAAC-OS analyzed by X-ray diffraction (XRD) is described. For example, when the structure of a CAAC-OS including an InGaZnO₄ crystal is analyzed by an out-of-plane method, a peak appears at a diffraction angle (2θ) of around 31° as shown in FIG. 20A. This peak is derived from the (009) plane of the InGaZnO₄ crystal, which indicates that crystals in the CAAC-OS have c-axis alignment, and that the c-axes are aligned in a direction substantially perpendicular to the formation surface or the top surface of the CAAC-OS.

Note that in structural analysis of the CAAC-OS by an out-of-plane method, another peak may appear when 2θ is around 36°, in addition to the peak at 2θ of around 31°. The peak of 2θ at around 36° indicates that a crystal having no c-axis alignment is included in part of the CAAC-OS. It is preferable that in the CAAC-OS analyzed by an out-of-plane method, a peak appear when 2θ is around 31° and that a peak not appear when 2θ is around 36°.

On the other hand, in structural analysis of the CAAC-OS by an in-plane method in which an X-ray is incident on a sample in a direction substantially perpendicular to the c-axis, a peak appears when 2θ is around 56°. This peak is derived from the (110) plane of the InGaZnO₄ crystal. In the case of the CAAC-OS, when analysis (ϕ scan) is performed with 2θ fixed at around 56° and with the sample rotated using a normal vector of the sample surface as an axis (ϕ axis), as shown in FIG. 20B, a peak is not clearly observed. In contrast, in the case of a single crystal oxide semiconductor of InGaZnO₄, when ϕ scan is performed with 2θ fixed at around 56°, as shown in FIG. 20C, six peaks which are derived from crystal planes equivalent to the (110) plane are observed. Accordingly, the structural analysis using XRD shows that the directions of a-axes and b-axes are irregularly oriented in the CAAC-OS.

Next, a CAAC-OS analyzed by electron diffraction is described. For example, when an electron beam with a probe diameter of 300 nm is incident on a CAAC-OS including an InGaZnO₄ crystal in a direction parallel to the sample surface, a diffraction pattern (also referred to as a selected-area transmission electron diffraction pattern) shown in FIG. 21A can be obtained. In this diffraction pattern, spots derived from the (009) plane of an InGaZnO₄ crystal are included. Thus, the electron diffraction also indicates that pellets included in the CAAC-OS have c-axis alignment and that the c-axes are aligned in a direction substantially perpendicular to the formation surface or the top surface of the CAAC-OS. Meanwhile, FIG. 21B shows a diffraction pattern obtained in such a manner that an electron beam with a probe diameter of 300 nm is incident on the same sample in a direction perpendicular to the sample surface. As shown in FIG. 21B, a ring-like diffraction pattern is observed. Thus, the electron diffraction also indicates that the a-axes and b-axes of the pellets included in the CAAC-OS do not have regular alignment. The first ring in FIG. 21B is considered to be derived from the (010) plane, the (100) plane, and the like of the InGaZnO₄ crystal. Furthermore, it is supposed that the second ring in FIG. 21B is derived from the (110) plane and the like.

As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Entry of impurities, formation of defects, or the like might decrease the crystallinity of an oxide semiconductor. This means that the CAAC-OS has small amounts of impurities and defects (e.g., oxygen vacancies).

Note that the impurity means an element other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, or a transition metal element. For example, an element (specifically, silicon or the like) having higher strength of bonding to oxygen than a metal element included in an oxide semiconductor extracts oxygen from the oxide semiconductor, which results in disorder of the atomic arrangement and reduced crystallinity of the oxide semiconductor. A heavy metal such as iron or nickel, argon, carbon dioxide, or the like has a large atomic radius (or molecular radius), and thus disturbs the atomic arrangement of the oxide semiconductor and decreases crystallinity.

The characteristics of an oxide semiconductor having impurities or defects might be changed by light, heat, or the like. Impurities contained in the oxide semiconductor might serve as carrier traps or carrier generation sources, for example. Furthermore, an oxygen vacancy in the oxide semiconductor serves as a carrier trap or serves as a carrier generation source when hydrogen is captured therein.

The CAAC-OS having small numbers of impurities and oxygen vacancies is an oxide semiconductor film with low carrier density (specifically, lower than 8×10¹¹/cm³, preferably lower than 1×10¹¹/cm³, or further preferably lower than 1×10¹⁰/cm³, and is higher than or equal to 1×10⁻⁹/cm³). Such an oxide semiconductor is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. A CAAC-OS has a low impurity concentration and a low density of defect states. Thus, the CAAC-OS can be referred to as an oxide semiconductor having stable characteristics.

<nc-OS>

Next, an nc-OS is described.

An nc-OS has a region in which a crystal part is observed and a region in which a crystal part is not clearly observed in a high-resolution TEM image. In most cases, the size of a crystal part included in the nc-OS is greater than or equal to 1 nm and less than or equal to 10 nm, or greater than or equal to 1 nm and less than or equal to 3 nm. Note that an oxide semiconductor including a crystal part whose size is greater than 10 nm and less than or equal to 100 nm is sometimes referred to as a microcrystalline oxide semiconductor. In a high-resolution TEM image of the nc-OS, for example, a grain boundary is not clearly observed in some cases. Note that there is a possibility that the origin of the nanocrystal is the same as that of a pellet in a CAAC-OS. Therefore, a crystal part of the nc-OS may be referred to as a pellet in the following description.

In the nc-OS, a microscopic region (e.g., a region with a size greater than or equal to 1 nm and less than or equal to 10 nm, in particular, a region with a size greater than or equal to 1 nm and less than or equal to 3 nm) has a periodic atomic arrangement. There is no regularity of crystal orientation between different pellets in the nc-OS. Thus, the orientation of the whole film is not observed. Accordingly, the nc-OS cannot be distinguished from an a-like OS and an amorphous oxide semiconductor, depending on an analysis method. For example, when the nc-OS is analyzed by an out-of-plane method using an X-ray beam having a diameter larger than the size of a pellet, a peak which shows a crystal plane does not appear. Furthermore, a diffraction pattern like a halo pattern is observed when the nc-OS is subjected to electron diffraction using an electron beam with a probe diameter (e.g., 50 nm or larger) that is larger than the size of a pellet. Meanwhile, spots appear in a nanobeam electron diffraction pattern of the nc-OS when an electron beam having a probe diameter close to or smaller than the size of a pellet is applied. Moreover, in a nanobeam electron diffraction pattern of the nc-OS, regions with high luminance in a circular (ring) pattern are shown in some cases. Also in a nanobeam electron diffraction pattern of the nc-OS layer, a plurality of spots is shown in a ring-like region in some cases.

Since there is no regularity of crystal orientation between the pellets (nanocrystals) as mentioned above, the nc-OS can also be referred to as an oxide semiconductor including random aligned nanocrystals (RANC) or an oxide semiconductor including non-aligned nanocrystals (NANC).

The nc-OS is an oxide semiconductor that has high regularity as compared with an amorphous oxide semiconductor. Therefore, the nc-OS is likely to have a lower density of defect states than an a-like OS and an amorphous oxide semiconductor. Note that there is no regularity of crystal orientation between different pellets in the nc-OS. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

<A-Like OS>

An a-like OS has a structure intermediate between those of the nc-OS and the amorphous oxide semiconductor.

In a high-resolution TEM image of the a-like OS, a void may be observed. Furthermore, in the high-resolution TEM image, there are a region where a crystal part is clearly observed and a region where a crystal part is not observed.

The a-like OS has an unstable structure because it includes a void. To verify that an a-like OS has an unstable structure as compared with a CAAC-OS and an nc-OS, a change in structure caused by electron irradiation is described below.

An a-like OS (sample A), an nc-OS (sample B), and a CAAC-OS (sample C) are prepared as samples subjected to electron irradiation. Each of the samples is an In—Ga—Zn oxide.

First, a high-resolution cross-sectional TEM image of each sample is obtained. The high-resolution cross-sectional TEM images show that all the samples have crystal parts.

Note that which part is regarded as a crystal part is determined as follows. It is known that a unit cell of the InGaZnO₄ crystal has a structure in which nine layers including three In—O layers and six Ga—Zn—O layers are stacked in the c-axis direction. The distance between the adjacent layers is equivalent to the lattice spacing on the (009) plane (also referred to as d value). The value is calculated to be 0.29 nm from crystal structural analysis. Accordingly, a portion where the lattice spacing between lattice fringes is greater than or equal to 0.28 nm and less than or equal to 0.30 nm is regarded as a crystal part of InGaZnO₄. Each of lattice fringes corresponds to the a-b plane of the InGaZnO₄ crystal.

FIG. 33 shows change in the average size of crystal parts (at 22 points to 45 points) in each sample. Note that the crystal part size corresponds to the length of a lattice fringe. FIG. 33 indicates that the crystal part size in the a-like OS increases with an increase in the cumulative electron dose. Specifically, as shown by (1) in FIG. 33, a crystal part of approximately 1.2 nm at the start of TEM observation (the crystal part is also referred to as an initial nucleus) grows to a size of approximately 2.6 nm at a cumulative electron dose of 4.2×10⁸ e⁻/nm². In contrast, the crystal part size in the nc-OS and the CAAC-OS shows little change from the start of electron irradiation to a cumulative electron dose of 4.2×10⁸ e⁻/nm². Specifically, as shown by (2) and (3) in FIG. 33, the average crystal sizes in an nc-OS and a CAAC-OS are approximately 1.4 nm and approximately 2.1 nm, respectively, regardless of the cumulative electron dose.

In this manner, growth of the crystal part in the a-like OS is induced by electron irradiation. In contrast, in the nc-OS and the CAAC-OS, growth of the crystal part is hardly induced by electron irradiation. Therefore, the a-like OS has an unstable structure as compared with the nc-OS and the CAAC-OS.

The a-like OS has a lower density than the nc-OS and the CAAC-OS because it includes a void. Specifically, the density of the a-like OS is higher than or equal to 78.6% and lower than 92.3% of the density of the single crystal oxide semiconductor having the same composition. The density of each of the nc-OS and the CAAC-OS is higher than or equal to 92.3% and lower than 100% of the density of the single crystal oxide semiconductor having the same composition. Note that it is difficult to deposit an oxide semiconductor having a density of lower than 78% of the density of the single crystal oxide semiconductor.

For example, in the case of an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, the density of single crystal InGaZnO₄ with a rhombohedral crystal structure is 6.357 g/cm³. Accordingly, in the case of the oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, the density of the a-like OS is higher than or equal to 5.0 g/cm³ and lower than 5.9 g/cm³. For example, in the case of the oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, the density of each of the nc-OS and the CAAC-OS is higher than or equal to 5.9 g/cm³ and lower than 6.3 g/cm³.

Note that there is a possibility that an oxide semiconductor having a certain composition cannot exist in a single crystal structure. In that case, single crystal oxide semiconductors with different compositions are combined at an adequate ratio, which makes it possible to calculate density equivalent to that of a single crystal oxide semiconductor with the desired composition. The density of a single crystal oxide semiconductor having the desired composition can be calculated using a weighted average according to the combination ratio of the single crystal oxide semiconductors with different compositions. Note that it is preferable to use as few kinds of single crystal oxide semiconductors as possible to calculate the density.

As described above, oxide semiconductors have various structures and various properties. Note that an oxide semiconductor may be a stacked layer including two or more of an amorphous oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS, for example.

The structure and method described in this embodiment can be implemented by being combined as appropriate with any of the other structures and methods described in the other embodiments.

Embodiment 3

In this embodiment, an example of a display device that includes any of the transistors described in the embodiment above will be described below with reference to FIG. 22, FIG. 23, and FIG. 24.

FIG. 22 is a top view of an example of a display device. A display device 700 illustrated in FIG. 22 includes a pixel portion 702 provided over a first substrate 701; a source driver circuit portion 704 and a gate driver circuit portion 706 provided over the first substrate 701; a sealant 712 provided to surround the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706; and a second substrate 705 provided to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with the sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed with the first substrate 701, the sealant 712, and the second substrate 705. Although not illustrated in FIG. 22, a display element is provided between the first substrate 701 and the second substrate 705.

In the display device 700, a flexible printed circuit (FPC) terminal portion 708 electrically connected to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 is provided in a region different from the region which is surrounded by the sealant 712 and positioned over the first substrate 701. Furthermore, an FPC 716 is connected to the FPC terminal portion 708, and a variety of signals and the like are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 through the FPC 716. Furthermore, a signal line 710 is connected to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708. Various signals and the like are applied to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 via the signal line 710 from the FPC 716.

A plurality of gate driver circuit portions 706 may be provided in the display device 700. An example of the display device 700 in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed over the first substrate 701 where the pixel portion 702 is also formed is described; however, the structure is not limited thereto. For example, only the gate driver circuit portion 706 may be formed over the first substrate 701 or only the source driver circuit portion 704 may be formed over the first substrate 701. In this case, a substrate where a source driver circuit, a gate driver circuit, or the like is formed (e.g., a driver-circuit substrate formed using a single-crystal semiconductor film or a polycrystalline semiconductor film) may be mounted on the first substrate 701. Note that there is no particular limitation on the method of connecting a separately prepared driver circuit substrate, and a chip on glass (COG) method, a wire bonding method, or the like can be used.

The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 included in the display device 700 include a wiring portion or a plurality of transistors. As the wiring portion or the plurality of transistors, any of the semiconductor devices of embodiments of the present invention can be used.

The display device 700 can include any of a variety of elements. The element includes, for example, at least one of a liquid crystal element, an electroluminescence (EL) element (e.g., an EL element including organic and inorganic materials, an organic EL element, or an inorganic EL element), an LED (e.g., a white LED, a red LED, a green LED, or a blue LED), a transistor (a transistor that emits light depending on current), an electron emitter, electronic ink, an electrophoretic element, a grating light valve (GLV), a plasma display panel (PDP), a display element using micro electro mechanical system (MEMS), a digital micromirror device (DMD), a digital micro shutter (DMS), MIRASOL (registered trademark), an interferometric modulator display (IMOD) element, a MEMS shutter display element, an optical-interference-type MEMS display element, an electrowetting element, a piezoelectric ceramic display, and a display element including a carbon nanotube. Other than the above, display media whose contrast, luminance, reflectivity, transmittance, or the like is changed by an electrical or magnetic effect may be included. Examples of display devices having EL elements include an EL display. Examples of display devices including electron emitters include a field emission display (FED) and an SED-type flat panel display (SED: surface-conduction electron-emitter display). Examples of display devices including liquid crystal elements include a liquid crystal display (e.g., a transmissive liquid crystal display, a transflective liquid crystal display, a reflective liquid crystal display, a direct-view liquid crystal display, or a projection liquid crystal display). An example of a display device including electronic ink or electrophoretic elements is electronic paper. In the case of a transflective liquid crystal display or a reflective liquid crystal display, some of or all of pixel electrodes function as reflective electrodes. For example, some or all of pixel electrodes are formed to include aluminum, silver, or the like. In such a case, a memory circuit such as an SRAM can be provided under the reflective electrodes, leading to lower power consumption.

As a display method in the display device 700, a progressive method, an interlace method, or the like can be employed. Furthermore, color elements controlled in a pixel at the time of color display are not limited to three colors: R, G, and B (R, G, and B correspond to red, green, and blue, respectively). For example, four pixels of the R pixel, the G pixel, the B pixel, and a W (white) pixel may be included. Alternatively, a color element may be composed of two colors among R, G, and B as in PenTile layout. The two colors may differ among color elements. Alternatively, one or more colors of yellow, cyan, magenta, and the like may be added to RGB. Furthermore, the size of a display region may be different depending on respective dots of the color components. Embodiments of the disclosed invention are not limited to a display device for color display; the disclosed invention can also be applied to a display device for monochrome display.

A coloring layer (also referred to as a color filter) may be used in order to obtain a full-color display device in which white light (W) for a backlight (e.g., an organic EL element, an inorganic EL element, an LED, or a fluorescent lamp) is used. As the coloring layer, red (R), green (G), blue (B), yellow (Y), or the like may be combined as appropriate, for example. With the use of the coloring layer, higher color reproducibility can be obtained than in the case without the coloring layer. In this case, by providing a region with the coloring layer and a region without the coloring layer, white light in the region without the coloring layer may be directly utilized for display. By partly providing the region without the coloring layer, a decrease in luminance due to the coloring layer can be suppressed, and 20% to 30% of power consumption can be reduced in some cases when an image is displayed brightly. Note that in the case where full-color display is performed using a self-luminous element such as an organic EL element or an inorganic EL element, elements may emit light of their respective colors R, G, B, Y, and W. By using a self-luminous element, power consumption can be further reduced as compared to the case of using the coloring layer in some cases.

In this embodiment, a structure including a liquid crystal element and an EL element as display elements is described with reference to FIG. 23 and FIG. 24. Note that FIG. 23 is a cross-sectional view taken along the dashed-dotted line Q-R in FIG. 22 and shows a structure including a liquid crystal element as a display element, whereas FIG. 24 is a cross-sectional view taken along the dashed-dotted line Q-R in FIG. 22 and shows a structure including an EL element as a display element.

Common portions between FIG. 23 and FIG. 24 are described first, and then different portions are described.

<Common Portions in Display Devices>

The display device 700 illustrated in FIG. 23 and FIG. 24 include a lead wiring portion 711, the pixel portion 702, the source driver circuit portion 704, and the FPC terminal portion 708. Note that the lead wiring portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and a capacitor 790 (a capacitor 790 a or 790 b). The source driver circuit portion 704 includes a transistor 752.

The semiconductor device in FIGS. 1A and 1B or FIGS. 2A and 2B can be used for the lead wiring portion 711. Note that in FIG. 23 and FIG. 24, only the signal line 710 is illustrated to avoid complexity.

The signal line 710 is formed in the same process as conductive films functioning as a source electrode and a drain electrode of the transistor 750 or 752. Note that the signal line 710 may be formed using a conductive film which is formed in a different process as a source electrode and a drain electrode of the transistor 750 or 752, for example, a conductive film functioning as a gate electrode may be used. In the case where the signal line 710 is formed using a material including a copper element, signal delay or the like due to wiring resistance is reduced, which enables display on a large screen.

Any of the transistors described above can be used as the transistors 750 and 752.

The transistors used in this embodiment each include an oxide semiconductor film which is highly purified and which suppresses formation of an oxygen vacancy. In the transistor, the current in an off state (off-state current) can be made small. Accordingly, an electrical signal such as an image signal can be held for a longer period, and a writing interval can be set longer in an on state. Accordingly, frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption.

In addition, the transistor used in this embodiment can have relatively high field-effect mobility and thus is capable of high speed operation. For example, with such a transistor which can operate at high speed used for a liquid crystal display device, a switching transistor in a pixel portion and a driver transistor in a driver circuit portion can be formed over one substrate. That is, a semiconductor device formed using a silicon wafer or the like is not additionally needed as a driver circuit, by which the number of components of the semiconductor device can be reduced. In addition, the transistor which can operate at high speed can be used also in the pixel portion, whereby a high-quality image can be provided.

The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and the FPC 716. Note that the connection electrode 760 is formed in the same process as conductive films functioning as a source electrode and a drain electrode of the transistor 750 or 752. The connection electrode 760 is electrically connected to a terminal included in the FPC 716 through the anisotropic conductive film 780.

For example, a glass substrate can be used as the first substrate 701 and the second substrate 705. A flexible substrate may be used as the first substrate 701 and the second substrate 705. Examples of the flexible substrate include a plastic substrate.

Furthermore, a light-blocking film 738 functioning as a black matrix, a coloring film 736 functioning as a color filter, and an insulating film 734 in contact with the light-blocking film 738 and the coloring film 736 are provided on the second substrate 705 side.

A structure body 778 is provided between the first substrate 701 and the second substrate 705. The structure body 778 is a columnar spacer obtained by selective etching of an insulating film and provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Note that a spherical spacer may be used as the structure body 778. Although the structure in which the structure body 778 is provided on the second substrate 705 side is illustrated in FIG. 23 as an example, one embodiment of the present invention is not limited thereto. For example, a structure in which the structure body 778 is provided on the first substrate 701 side as illustrated in FIG. 24, or a structure in which both of the first substrate 701 and the second substrate 705 are provided with the structure body 778 may be employed.

In FIG. 23 and FIG. 24, insulating films 764, 766, 768, and 769 are formed over the transistor 750, the transistor 752, and the capacitor 790.

The insulating films 764, 766, 768, and 769 can be formed using materials and methods similar to those of the insulating films 114, 116, 118, and 122 described in the above embodiment, respectively.

<Structure Example of Display Device Using Liquid Crystal Element as Display Element>

The display device 700 illustrated in FIG. 23 includes the capacitor 790 a. The capacitor 790 a includes a dielectric between a pair of electrodes. Specifically, an oxide semiconductor film with high conductivity which is formed using steps of forming the same oxide semiconductor film as the oxide semiconductor film functioning as a semiconductor layer of the transistor 750 is used as one electrode of the capacitor 790 a, and a conductive film 772 electrically connected to the transistor 750 is used as the other electrode of the capacitor 790 a.

Here, an oxide semiconductor film with high conductivity which functions as one electrode of the capacitor 790 a is described below.

<Oxide Semiconductor Film With High Conductivity>

When hydrogen is added to an oxide semiconductor including oxygen vacancies, hydrogen enters oxygen vacant sites and forms a donor level in the vicinity of the conduction band. As a result, the conductivity of the oxide semiconductor is increased, so that the oxide semiconductor becomes a conductor. An oxide semiconductor having become a conductor can be referred to as an oxide conductor. Oxide semiconductors generally have a visible light-transmitting property because of their large energy gap. An oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. Therefore, the influence of absorption due to the donor level is small, and an oxide conductor has a visible light-transmitting property comparable to that of an oxide semiconductor.

Here, the temperature dependence of resistivity of a film formed with an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)) and that of a film formed with an oxide conductor (hereinafter referred to as an oxide conductor film (OC)) will be described with reference to FIG. 28. In FIG. 28, the horizontal axis represents measurement temperature, and the vertical axis represents resistivity. Measurement results of the oxide semiconductor film (OS) are plotted as circles, and measurement results of the oxide conductor film (OC) are plotted as squares.

Note that a sample including the oxide semiconductor film (OS) was prepared by forming a 35-nm-thick In—Ga—Zn oxide film over a glass substrate by a sputtering method using a sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2, forming a 20-nm-thick In—Ga—Zn oxide film over the 35-nm-thick In—Ga—Zn oxide film by a sputtering method using a sputtering target with an atomic ratio of In:Ga:Zn=1:4:5, performing heat treatment in a 450° C. nitrogen atmosphere and then performing heat treatment in a 450° C. atmosphere of a mixed gas of nitrogen and oxygen, and forming a silicon oxynitride film over the 20-nm-thick In—Ga—Zn oxide film by a plasma CVD method.

A sample including the oxide conductor film (OC) was prepared by forming a 100-nm-thick In—Ga—Zn oxide film over a glass substrate by a sputtering method using a sputtering target with an atomic ratio of In:Ga:Zn=1:1:1, performing heat treatment in a 450° C. nitrogen atmosphere and then performing heat treatment in a 450° C. atmosphere of a mixed gas of nitrogen and oxygen, and forming a silicon nitride film over the 100-nm-thick In—Ga—Zn oxide film by a plasma CVD method.

As can be seen from FIG. 28, the temperature dependence of resistivity of the oxide conductor film (OC) is lower than the temperature dependence of resistivity of the oxide semiconductor film (OS). Typically, the range of variation of resistivity of the oxide conductor film (OC) at temperatures from 80 K to 290 K is from more than −20% to less than +20%. Alternatively, the range of variation of resistivity at temperatures from 150 K to 250 K is from more than −10% to less than +10%. In other words, the oxide conductor is a degenerate semiconductor and it is suggested that the conduction band edge agrees with or substantially agrees with the Fermi level. Therefore, the oxide conductor film can be used as one electrode of the capacitor 790 a.

In addition, the display device 700 illustrated in FIG. 23 includes a liquid crystal element 775. The liquid crystal element 775 includes the conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is provided on the second substrate 705 side and functions as a counter electrode. The display device 700 in FIG. 23 is capable of displaying an image in such a manner that transmission or non-transmission is controlled by change in the alignment state of the liquid crystal layer 776 depending on a voltage applied to the conductive film 772 and the conductive film 774.

The conductive film 772 is connected to the conductive films functioning as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the insulating film 768 to function as a pixel electrode, i.e., one electrode of the display element.

The conductive film 772 can be formed using a material and a method similar to those of the conductive films 120, 120 a, and 120 b described in the above embodiment.

Although not illustrated in FIG. 23, an alignment film may be provided on a side of the conductive film 772 in contact with the liquid crystal layer 776 and on a side of the conductive film 774 in contact with the liquid crystal layer 776. Although not illustrated in FIG. 23, an optical member (an optical substrate) and the like such as a polarizing member, a retardation member, or an anti-reflection member may be provided as appropriate. For example, circular polarization may be employed by using a polarizing substrate and a retardation substrate. In addition, a backlight, a sidelight, or the like may be used as a light source.

In the case where a liquid crystal element is used as the display element, a thermotropic liquid crystal, a low-molecular liquid crystal, a high-molecular liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an anti-ferroelectric liquid crystal, or the like can be used. Such a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on conditions.

Alternatively, in the case of employing a horizontal electric field mode, a liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used. A blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while temperature of cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which several weight percent or more of a chiral material is mixed is used for the liquid crystal layer in order to improve the temperature range. The liquid crystal composition which includes liquid crystal exhibiting a blue phase and a chiral material has a short response time and optical isotropy, which makes the alignment process unneeded. In addition, the liquid crystal composition which includes liquid crystal exhibiting a blue phase and a chiral material has a small viewing angle dependence. An alignment film does not need to be provided and rubbing treatment is thus not necessary; accordingly, electrostatic discharge damage caused by the rubbing treatment can be prevented and defects and damage of the liquid crystal display device in the manufacturing process can be reduced.

In the case where a liquid crystal element is used as the display element, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, or the like can be used.

Furthermore, a normally black liquid crystal display device such as a transmissive liquid crystal display device utilizing a vertical alignment (VA) mode may also be used. There are some examples of a vertical alignment mode; for example, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an ASV mode, or the like can be employed.

<Display Device Using Light-Emitting Element as Display Element>

The display device 700 illustrated in FIG. 24 includes the capacitor 790 b. The capacitor 790 b includes a dielectric between a pair of electrodes. Specifically, a conductive film which is formed using steps of forming the same conductive film as the conductive film functioning as a gate electrode of the transistor 750 is used as one electrode of the capacitor 790 b, and a conductive film functioning as a source electrode or a drain electrode of the transistor 750 is used as the other electrode of the capacitor 790 b. Furthermore, an insulating film functioning as a gate insulating film of the transistor 750 is used as the dielectric between the pair of electrodes.

In FIG. 24, a planarization insulating film 770 is formed over the insulating film 769.

The planarization insulating film 770 can be formed using a heat-resistant organic material, such as a polyimide resin, an acrylic resin, a polyimide amide resin, a benzocyclobutene resin, a polyamide resin, or an epoxy resin. Note that the planarization insulating film 770 may be formed by stacking a plurality of insulating films formed from these materials. Alternatively, a structure without the planarization insulating film 770 as illustrated in FIG. 23 may be employed.

The display device 700 illustrated in FIG. 24 includes a light-emitting element 782. The light-emitting element 782 includes a conductive film 784, an EL layer 786, and a conductive film 788. The display device 700 illustrated in FIG. 24 is capable of displaying an image by light emission from the EL layer 786 of the light-emitting element 782.

The conductive film 784 is connected to the conductive films functioning as a source electrode and a drain electrode of the transistor 750. The conductive film 784 is formed over the planarization insulating film 770 to function as a pixel electrode, i.e., one electrode of the display element. A conductive film which transmits visible light or a conductive film which reflects visible light can be used for the conductive film 784. The conductive film which transmits visible light can be formed using a material including one kind selected from indium (In), zinc (Zn), and tin (Sn), for example. The conductive film which reflects visible light can be formed using a material including aluminum or silver, for example.

In the display device 700 in FIG. 24, an insulating film 730 is provided over the planarization insulating film 770 and the conductive film 784. The insulating film 730 covers part of the conductive film 784. Note that the light-emitting element 782 has a top emission structure. Therefore, the conductive film 788 has a light-transmitting property and transmits light emitted from the EL layer 786. Although the top-emission structure is described as an example in this embodiment, one embodiment of the present invention is not limited thereto. A bottom-emission structure in which light is emitted to the conductive film 784 side, or a dual-emission structure in which light is emitted to both the conductive film 784 side and the conductive film 788 side may be employed.

The coloring film 736 is provided to overlap with the light-emitting element 782, and the light-blocking film 738 is provided to overlap with the insulating film 730 and to be included in the lead wiring portion 711 and in the source driver circuit portion 704. The coloring film 736 and the light-blocking film 738 are covered with the insulating film 734. A space between the light-emitting element 782 and the insulating film 734 is filled with a sealing film 732. Although a structure with the coloring film 736 is described as the structure of the display device 700 in FIG. 24, the structure is not limited thereto. In the case where the EL layer 786 is formed so that different colors of light are emitted from different pixels, the coloring film 736 is not necessarily provided.

The structure described in this embodiment can be used in appropriate combination with any of the structures described in the other embodiments.

Embodiment 4

In this embodiment, a display device that includes a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 25A to 25C.

The display device illustrated in FIG. 25A includes a region including pixels of display elements (hereinafter the region is referred to as a pixel portion 502), a circuit portion being provided outside the pixel portion 502 and including a circuit for driving the pixels (hereinafter the portion is referred to as a driver circuit portion 504), circuits each having a function of protecting an element (hereinafter the circuits are referred to as protection circuits 506), and a terminal portion 507. Note that the protection circuits 506 are not necessarily provided.

Part or the whole of the driver circuit portion 504 is preferably formed over a substrate over which the pixel portion 502 is formed, in which case the number of components and the number of terminals can be reduced. When part or the whole of the driver circuit portion 504 is not formed over the substrate over which the pixel portion 502 is formed, the part or the whole of the driver circuit portion 504 can be mounted by COG or tape automated bonding (TAB).

The pixel portion 502 includes a plurality of circuits for driving display elements arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more) (hereinafter such circuits are referred to as pixel circuits 501). The driver circuit portion 504 includes driver circuits such as a circuit for supplying a signal (scan signal) to select a pixel (hereinafter the circuit is referred to as a gate driver 504 a) and a circuit for supplying a signal (data signal) to drive a display element in a pixel (hereinafter the circuit is referred to as a source driver 504 b).

The gate driver 504 a includes a shift register or the like. The gate driver 504 a receives a signal for driving the shift register through the terminal portion 507 and outputs a signal. For example, the gate driver 504 a receives a start pulse signal, a clock signal, or the like and outputs a pulse signal. The gate driver 504 a has a function of controlling the potentials of wirings supplied with scan signals (hereinafter such wirings are referred to as scan lines GL_1 to GL_X). Note that a plurality of gate drivers 504 a may be provided to control the scan lines GL_1 to GL_X separately. Alternatively, the gate driver 504 a has a function of supplying an initialization signal. Without being limited thereto, the gate driver 504 a can supply another signal.

The source driver 504 b includes a shift register or the like. The source driver 504 b receives a signal (video signal) from which a data signal is derived, as well as a signal for driving the shift register, through the terminal portion 507. The source driver 504 b has a function of generating a data signal to be written to the pixel circuit 501 which is based on the video signal. In addition, the source driver 504 b has a function of controlling output of a data signal in response to a pulse signal produced by input of a start pulse signal, a clock signal, or the like. Furthermore, the source driver 504 b has a function of controlling the potentials of wirings supplied with data signals (hereinafter such wirings are referred to as data lines DL_1 to DL_Y). Alternatively, the source driver 504 b has a function of supplying an initialization signal. Without being limited thereto, the source driver 504 b can supply another signal.

The source driver 504 b includes a plurality of analog switches, for example. The source driver 504 b can output, as the data signals, signals obtained by time-dividing the video signal by sequentially turning on the plurality of analog switches. The source driver 504 b may include a shift register or the like.

A pulse signal and a data signal are input to each of the plurality of pixel circuits 501 through one of the plurality of scan lines GL supplied with scan signals and one of the plurality of data lines DL supplied with data signals, respectively. Writing and holding of the data signal to and in each of the plurality of pixel circuits 501 are controlled by the gate driver 504 a. For example, to the pixel circuit 501 in the m-th row and the n-th column (m is a natural number of less than or equal to X, and n is a natural number of less than or equal to Y), a pulse signal is input from the gate driver 504 a through the scan line GL_m, and a data signal is input from the source driver 504 b through the data line DL_n in accordance with the potential of the scan line GL_m.

The protection circuit 506 in FIG. 25A is connected to, for example, the scan line GL between the gate driver 504 a and the pixel circuit 501. Alternatively, the protection circuit 506 is connected to the data line DL between the source driver 504 b and the pixel circuit 501. Alternatively, the protection circuit 506 can be connected to a wiring between the gate driver 504 a and the terminal portion 507. Alternatively, the protection circuit 506 can be connected to a wiring between the source driver 504 b and the terminal portion 507. Note that the terminal portion 507 means a portion having terminals for inputting power, control signals, and video signals to the display device from external circuits.

The protection circuit 506 is a circuit that electrically connects a wiring connected to the protection circuit to another wiring when a potential out of a certain range is applied to the wiring connected to the protection circuit.

As illustrated in FIG. 25A, the protection circuits 506 are provided for the pixel portion 502 and the driver circuit portion 504, so that the resistance of the display device to overcurrent generated by electrostatic discharge (ESD) or the like can be improved. Note that the configuration of the protection circuits 506 is not limited thereto, and for example, the protection circuit 506 may be configured to be connected to the gate driver 504 a or the protection circuit 506 may be configured to be connected to the source driver 504 b. Alternatively, the protection circuit 506 may be configured to be connected to the terminal portion 507.

In FIG. 25A, an example in which the driver circuit portion 504 includes the gate driver 504 a and the source driver 504 b is shown; however, the structure is not limited thereto. For example, only the gate driver 504 a may be formed and a separately prepared substrate where a source driver circuit is formed (e.g., a driver circuit substrate formed with a single crystal semiconductor film or a polycrystalline semiconductor film) may be mounted.

Each of the plurality of pixel circuits 501 in FIG. 25A can have the structure illustrated in FIG. 25B, for example.

The pixel circuit 501 illustrated in FIG. 25B includes a liquid crystal element 570, a transistor 550, and a capacitor 560. As the transistor 550, any of the transistors described in the above embodiment, for example, can be used.

The potential of one of a pair of electrodes of the liquid crystal element 570 is set in accordance with the specifications of the pixel circuit 501 as appropriate. The alignment state of the liquid crystal element 570 depends on written data. A common potential may be supplied to one of the pair of electrodes of the liquid crystal element 570 included in each of the plurality of pixel circuits 501. Furthermore, the potential supplied to one of the pair of electrodes of the liquid crystal element 570 in the pixel circuit 501 in one row may be different from the potential supplied to one of the pair of electrodes of the liquid crystal element 570 in the pixel circuit 501 in another row.

As examples of a driving method of the display device including the liquid crystal element 570, any of the following modes can be given: a TN mode, an STN mode, a VA mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, an MVA mode, a patterned vertical alignment (PVA) mode, an IPS mode, an FFS mode, a transverse bend alignment (TBA) mode, and the like. Other examples of the driving method of the display device include an electrically controlled birefringence (ECB) mode, a polymer-dispersed liquid crystal (PDLC) mode, a polymer network liquid crystal (PNLC) mode, and a guest-host mode. Note that one embodiment of the present invention is not limited to these examples, and various liquid crystal elements and driving methods can be applied to the liquid crystal element and the driving method thereof.

In the pixel circuit 501 in the m-th row and the n-th column, one of a source electrode and a drain electrode of the transistor 550 is electrically connected to the data line DL_n, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. A gate electrode of the transistor 550 is electrically connected to the scan line GL_m. The transistor 550 has a function of controlling whether to write a data signal by being turned on or off

One of a pair of electrodes of the capacitor 560 is electrically connected to a wiring to which a potential is supplied (hereinafter referred to as a potential supply line VL), and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The potential of the potential supply line VL is set in accordance with the specifications of the pixel circuit 501 as appropriate. The capacitor 560 functions as a storage capacitor for storing written data.

For example, in the display device including the pixel circuit 501 in FIG. 25B, the pixel circuits 501 are sequentially selected row by row by the gate driver 504 a illustrated in FIG. 25A, whereby the transistors 550 are turned on and a data signal is written.

When the transistors 550 are turned off, the pixel circuits 501 in which the data has been written are brought into a holding state. This operation is sequentially performed row by row; thus, an image can be displayed.

Alternatively, each of the plurality of pixel circuits 501 in FIG. 25A can have the structure illustrated in FIG. 25C, for example.

The pixel circuit 501 illustrated in FIG. 25C includes a transistor 552, a transistor 554, a capacitor 562, and a light-emitting element 572. Any of the transistors described in the above embodiment, for example, can be used as one or both of the transistors 552 and 554.

One of a source electrode and a drain electrode of the transistor 552 is electrically connected to a wiring to which a data signal is supplied (hereinafter referred to as a signal line DL_n). A gate electrode of the transistor 552 is electrically connected to a wiring to which a gate signal is supplied (hereinafter referred to as a scan line GL_m).

The transistor 552 has a function of controlling whether to write a data signal by being turned on or off.

One of a pair of electrodes of the capacitor 562 is electrically connected to a wiring to which a potential is supplied (hereinafter referred to as a potential supply line VL_a), and the other is electrically connected to the other of a source electrode and a drain electrode of the transistor 552.

The capacitor 562 functions as a storage capacitor for storing written data.

One of a source electrode and a drain electrode of the transistor 554 is electrically connected to the potential supply line VL_a. Furthermore, a gate electrode of the transistor 554 is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

One of an anode and a cathode of the light-emitting element 572 is electrically connected to a potential supply line VL_b, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 554.

As the light-emitting element 572, an organic electroluminescent element (also referred to as an organic EL element) or the like can be used, for example. Note that the light-emitting element 572 is not limited to an organic EL element; an inorganic EL element including an inorganic material may be used.

A high power supply potential VDD is supplied to one of the potential supply line VL_a and the potential supply line VL_b, and a low power supply potential VSS is supplied to the other.

For example, in the display device including the pixel circuit 501 in FIG. 25C, the pixel circuits 501 are sequentially selected row by row by the gate driver 504 a illustrated in FIG. 25A, whereby the transistors 552 are turned on and a data signal is written.

When the transistors 552 are turned off, the pixel circuits 501 in which the data has been written are brought into a holding state. Furthermore, the amount of current flowing between the source electrode and the drain electrode of the transistor 554 is controlled in accordance with the potential of the written data signal. The light-emitting element 572 emits light with a luminance corresponding to the amount of flowing current. This operation is sequentially performed row by row; thus, an image can be displayed.

The structure described in this embodiment can be used in appropriate combination with any of the structures described in the other embodiments.

Embodiment 5

In this embodiment, a display module and electronic devices that include a semiconductor device of one embodiment of the present invention will be described with reference to FIG. 26 and FIGS. 27A to 27H.

In a display module 8000 illustrated in FIG. 26, a touch panel 8004 connected to an FPC 8003, a display panel 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed board 8010, and a battery 8011 are provided between an upper cover 8001 and a lower cover 8002.

The semiconductor device of one embodiment of the present invention can be used for, for example, the display panel 8006.

The shapes and sizes of the upper cover 8001 and the lower cover 8002 can be changed as appropriate in accordance with the sizes of the touch panel 8004 and the display panel 8006.

The touch panel 8004 can be a resistive touch panel or a capacitive touch panel and can be formed to overlap the display panel 8006. A counter substrate (sealing substrate) of the display panel 8006 can have a touch panel function. A photosensor may be provided in each pixel of the display panel 8006 to form an optical touch panel.

The backlight unit 8007 includes a light source 8008. Note that although a structure in which the light sources 8008 are provided over the backlight unit 8007 is illustrated in FIG. 26, one embodiment of the present invention is not limited to this structure. For example, a structure in which the light source 8008 is provided at an end portion of the backlight unit 8007 and a light diffusion plate is further provided may be employed. Note that the backlight unit 8007 need not be provided in the case where a self-luminous light-emitting element such as an organic EL element is used or in the case where a reflective panel or the like is employed.

The frame 8009 protects the display panel 8006 and also functions as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed board 8010. The frame 8009 may function as a radiator plate.

The printed board 8010 is provided with a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As a power source for supplying power to the power supply circuit, an external commercial power source or a power source using the battery 8011 provided separately may be used. The battery 8011 can be omitted in the case of using a commercial power source.

The display module 8000 may be additionally provided with a member such as a polarizing plate, a retardation plate, or a prism sheet.

FIGS. 27A to 27H illustrate electronic appliances. These electronic devices can include a housing 9000, a display portion 9001, a speaker 9003, an LED lamp 9004, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (a sensor having a function of measuring or sensing force, displacement, position, speed, acceleration, angular velocity, rotational frequency, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electric power, radiation, flow rate, humidity, gradient, oscillation, odor, or infrared ray), a microphone 9008, and the like.

FIG. 27A illustrates a mobile computer that can include a switch 9009, an infrared port 9010, and the like in addition to the above components. FIG. 27B illustrates a portable image reproducing device (e.g., a DVD player) that is provided with a memory medium and can include a second display portion 9002, a memory medium reading portion 9011, and the like in addition to the above components. FIG. 27C illustrates a goggle-type display that can include the second display portion 9002, a support 9012, an earphone 9013, and the like in addition to the above components. FIG. 27D illustrates a portable game machine that can include the memory medium reading portion 9011 and the like in addition to the above components. FIG. 27E illustrates a digital camera that has a television reception function and can include an antenna 9014, a shutter button 9015, an image receiving portion 9016, and the like in addition to the above components. FIG. 27F illustrates a portable game machine that can include the second display portion 9002, the memory medium reading portion 9011, and the like in addition to the above components. FIG. 27G illustrates a television receiver that can include a tuner, an image processing portion, and the like in addition to the above components. FIG. 27H illustrates a portable television receiver that can include a charger 9017 capable of transmitting and receiving signals, and the like in addition to the above components.

The electronic devices illustrated in FIGS. 27A to 27H can have a variety of functions, for example, a function of displaying a variety of data (a still image, a moving image, a text image, and the like) on the display portion, a touch panel function, a function of displaying a calendar, date, time, and the like, a function of controlling a process with a variety of software (programs), a wireless communication function, a function of being connected to a variety of computer networks with a wireless communication function, a function of transmitting and receiving a variety of data with a wireless communication function, a function of reading a program or data stored in a memory medium and displaying the program or data on the display portion, and the like. Furthermore, the electronic device including a plurality of display portions can have a function of displaying image data mainly on one display portion while displaying text data on another display portion, a function of displaying a three-dimensional image by displaying images on a plurality of display portions with a parallax taken into account, or the like. Furthermore, the electronic device including an image receiving portion can have a function of shooting a still image, a function of taking a moving image, a function of automatically or manually correcting a shot image, a function of storing a shot image in a memory medium (an external memory medium or a memory medium incorporated in the camera), a function of displaying a shot image on the display portion, or the like. Note that functions that can be provided for the electronic devices illustrated in FIGS. 27A to 27H are not limited to those described above, and the electronic devices can have a variety of functions.

The electronic devices described in this embodiment each include the display portion for displaying some sort of data. Note that the semiconductor device of one embodiment of the present invention can also be used for an electronic device that does not have a display portion.

The structure described in this embodiment can be used in appropriate combination with any of the structures described in the other embodiments.

EXAMPLE 1

In this example, evaluation results of an insulating film that can be used for the semiconductor device of one embodiment of the present invention will be described. Specifically, results of evaluating the number of ammonia molecules released by heating will be described.

First, a method for fabricating evaluated samples is described. The fabricated samples are a sample A1, a sample A2, and a sample A3. Note that the sample A1 is a sample for comparison, and the samples A2 and A3 are each a sample of one embodiment of the present invention.

<Sample A1>

For the sample A1, a 100-nm-thick silicon nitride film was formed over a glass substrate with a PECVD apparatus. As formation conditions of the silicon nitride film, the substrate temperature was 350° C.; silane with a flow rate of 50 sccm, nitrogen with a flow rate of 5000 sccm, and ammonia with a flow rate of 100 sccm were used as a source gas; the pressure in a treatment chamber was 100 Pa; and high-frequency power of 1000 W (the power density of 1.6×10⁻¹ W/cm²) at 27.12 MHz was supplied to parallel-plate electrodes.

<Sample A2>

For the sample A2, a 100-nm-thick silicon nitride film was formed over a glass substrate with a PECVD apparatus. As formation conditions of the silicon nitride film, the substrate temperature was 350° C.; silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia with a flow rate of 100 sccm were used as a source gas; the pressure in a treatment chamber was 100 Pa; and high-frequency power of 2000 W (the power density of 3.2×10⁻¹ W/cm²) at 27.12 MHz was supplied to parallel-plate electrodes.

<Sample A3>

For the sample A3, a 100-nm-thick silicon nitride film was formed over a glass substrate with a PECVD apparatus. As formation conditions of the silicon nitride film, the substrate temperature was 350° C.; silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 sccm were used as a source gas; the pressure in a treatment chamber was 100 Pa; and high-frequency power of 2000 W (the power density of 3.2×10⁻¹ W/cm²) at 27.12 MHz was supplied to parallel-plate electrodes.

Next, thermal desorption spectroscopy (TDS) analyses were performed on the samples A1 to A3 fabricated as described above. In each of the samples, the glass substrate was heated at a temperature higher than or equal to 65° C. and lower than or equal to 610° C.

The peaks of the curves shown in the results obtained from TDS appear due to release of atoms or molecules contained in the analyzed samples (in this example, the samples A1 to A3) to the outside. The total number of the atoms or molecules released to the outside corresponds to the integral value of the peak. Thus, with the degree of the peak intensity, the number of the atoms or molecules contained in the silicon nitride film can be evaluated.

FIG. 29 shows the results of the TDS analyses on the samples A1 to A3. Note that FIG. 29 is a graph showing the numbers of ammonia molecules released in the samples. The ammonia molecules were calculated from the integral values of curve peaks that showed the amount of a released gas which had a M/z of 17, typically ammonia molecules, which was observed in TDS analysis.

According to FIG. 29, the number of ammonia molecules released in the sample A1 was 3.8×10¹⁵ molecules/cm³, that in the sample A2 was 5.2×10¹³ molecules/cm³, and that in the sample A3 was 7.6×10¹³ molecules/cm³.

The structure described in this example can be used in appropriate combination with any of the structures described in the other embodiments and examples.

EXAMPLE 2

In this example, evaluation results of conductive films and insulating films that can be used for the semiconductor device of one embodiment of the present invention will be described. Observation results of the conductive films and the insulating films with the optical microscope will be described in detail.

First, a method for fabricating evaluated samples is described. The fabricated samples are a sample B1, a sample B2, and a sample B3. Note that the sample B1 is a sample for comparison, the sample B2 is a sample of one embodiment of the present invention, and the sample B3 is a sample for comparison. FIG. 30 is a top view common to the samples B1 to B3. Description will be given below with reference to FIG. 30.

<Sample B1>

For the sample B1, a first conductive film 802 was formed over a glass substrate. The first conductive film 802 had a stacked-layer structure of three layers of a 50-nm thick tungsten film, a 400-nm-thick aluminum film, and a 100-nm-thick titanium film. Note that the first conductive film 802 was formed with a sputtering apparatus. Then, a mask was formed over the first conductive film 802 by a lithography process and then processed with a dry etching apparatus, and the first conductive film 802 was processed into desired shapes (first conductive films 802 a and 802 b in FIG. 30).

Next, a first insulating film was formed over the first conductive film 802. The first insulating film had a stacked-layer structure of two layers of a 50-nm-thick first silicon oxynitride film and a 400-nm-thick second silicon oxynitride film. As formation conditions of the first silicon oxynitride film, the substrate temperature was 220° C.; silane with a flow rate of 50 sccm and dinitrogen monoxide with a flow rate of 2000 sccm were used as a source gas; the pressure in a treatment chamber was 20 Pa; and high-frequency power of 100 W (the power density of 1.6×10⁻² W/cm²) at 13.56 MHz was supplied to parallel-plate electrodes. As formation conditions of the second silicon oxynitride film, the substrate temperature was 220° C.; silane with a flow rate of 160 sccm and dinitrogen monoxide with a flow rate of 2000 sccm were used as a source gas; the pressure in a treatment chamber was 200 Pa; and high-frequency power of 1500 W (the power density of 2.4×10⁻¹ W/cm²) at 13.56 MHz was supplied to parallel-plate electrodes.

Next, heat treatment was performed at 350° C. in a mixed gas atmosphere of a nitrogen gas and an oxygen gas for 1 hour.

Next, an opening 806 was formed in the first insulating film. The opening 806 was formed to reach the first conductive films 802 a and 802 b. Note that a plurality of 30 openings 806 (four openings 806 in FIG. 30) were formed.

Next, a second conductive film 804 was formed over the first insulating film so as to cover the openings 806. As the second conductive film 804, a 100-nm-thick indium tin oxide film to which silicon oxide was added was formed. As formation conditions of the indium tin oxide film to which silicon oxide was added, the substrate temperature was room temperature; argon with a flow rate of 72 sccm and oxygen with a flow rate of 5 sccm were used as a deposition gas; the pressure in a treatment chamber was 0.15 Pa; and DC power of 3200 W was supplied to a sputtering target (In2O₃:SnO₂:SiO₂=85:10:5 [wt %]). Then, a mask was formed over the second conductive film 804 by a lithography process and then processed with a dry etching apparatus, and the second conductive film 804 was processed into a desired shape. Note that the second conductive film 804 had a comb-like electrode shape as illustrated in FIG. 30. As the size of the comb-like electrode, 10 L/W was set to 24436.55 mm/5 nm. The two-dot chain line is an ellipsis indicating that the second conductive film 804 is not fully illustrated in the L length direction. One end of the comb-like electrode was electrically connected to the first conductive film 802 a and the other end of the comb-like electrode was electrically connected to the first conductive film 802 b.

Next, a third insulating film was formed over the second conductive film 804. The third insulating film was formed under the same conditions as the silicon nitride film of the sample A1 described in the above example.

<Sample B2>

For the sample B2, a first conductive film 802 (first conductive films 802 a and 80 b), a first insulating film over the first conductive film 802 (first conductive films 802 a and 802 b), and a second conductive film 804 over the first insulating film were formed over a glass substrate. Note that the first conductive film 802 (first conductive films 802 a and 802 b), the first insulating film, and the second conductive film 804 were formed under the same conditions as the sample B1 described above using the same material.

Next, a third insulating film was formed over the second conductive film. The third insulating film was formed under the same conditions as the silicon nitride film of the sample A3 described in the above example.

<Sample B3>

For the sample B3, the first conductive film 802 (first conductive films 802 a and 802 b), the first insulating film over the first conductive film 802 (first conductive films 802 a and 802 b), and the second conductive film 804 over the first insulating film were formed over a glass substrate. Note that the first conductive film 802 (first conductive films 802 a and 802 b), the first insulating film, and the second conductive film 804 were formed under the same conditions as the sample B1 described above using the same material. Note that in the sample B3, the third insulating film is not formed over the second conductive film 804.

Next, the appearances of the samples B1 and B2 fabricated as describe above were observed with an optical microscope.

FIGS. 31A and 31B show the appearance of the sample B1 and the appearance of the sample B2, respectively, which were observed with an optical microscope. Note that FIG. 31A shows the result of the sample B1, and FIG. 31B shows the result of the sample B2.

According to the results shown in FIGS. 31A and 31B, many defects in appearance were found in the sample B1; however, no defect in appearance was found in the sample B2. Note that it was found that most of the defects in appearance were caused by 20 alteration of the second conductive film 804. This is probably because the conditions for formation of the silicon nitride films used as the third insulating films in the samples B1 and B2 were different. The silicon nitride film used as the third insulating film in the sample B1 is an insulating film which releases ammonia molecules in excess of 1×10¹⁵ molecules/cm³ as described in Example 1, and the silicon nitride film used as the third insulating film in the sample B2 is an insulating film which releases ammonia molecules of less than or equal to 1×10¹⁵ molecules/cm³ as described in Example 1. Although not shown in FIGS. 31A and 31B, there was no defect in appearance because the third insulating film was not formed in the sample B3. Therefore, it is indicated that the second conductive film 804 is altered when a number of ammonia molecules are released from the third insulating film.

Next, a stress test under high temperature and high humidity was performed on the samples B2 and B3 fabricated as described above. As conditions of the stress test under high temperature and high humidity, the temperature and humidity of the evaluation environment were 60° C. and 95%, respectively. A voltage of 15 V was applied to the first conductive films 802 a and 802 b and the second conductive film 804 for 12 hours. Note that as a method for applying voltage to the second conductive film 804, voltage was applied from the outside in such a manner that 15 V was applied to the first conductive film 802 a in FIG. 30 and the first conductive film 802 b was fixed to the 0 V.

Next, the appearances of the samples B2 and B3 subjected to the above stress test under high temperature and high humidity were observed with an optical microscope.

FIGS. 32A and 32B show the appearance of the sample B2 and the appearance of the sample B3, respectively, which were observed with an optical microscope. Note that FIG. 32A shows the result of the sample B2, and FIG. 32B shows the result of the sample B3.

According to the results shown in FIGS. 32A and 32B, there was less defects in the appearance of the sample B2 in which the third insulating film was formed over the second conductive film. On the other hand, corrosion of the first conductive film and the second conductive film was found in the sample B3 in which the third insulating film was not formed over the second conductive film.

As described above, it was found that corrosion of the first conductive film 802 and the second conductive film 804 which were subjected to the stress test under high temperature and high humidity was able to be suppressed when a silicon nitride film which would release ammonia molecules of less than or equal to 1×10¹⁵ molecules/cm³ in TDS analysis was formed as the third insulating film over the second conductive film, here, the indium tin oxide film to which silicon oxide was added.

The structure described in this example can be used in appropriate combination with any of the structures described in the other embodiments and examples.

This application is based on Japanese Patent Application serial No. 2014-057528 filed with Japan Patent Office on Mar. 20, 2014, the entire contents of which are hereby incorporated by reference. 

What is claimed is:
 1. A method for manufacturing a semiconductor device comprising the steps of: forming a conductive film; forming a insulating film over the conductive film, wherein the conductive film comprises one or more of indium and oxygen, and wherein the insulating film includes silicon and nitrogen, and the number of ammonia molecules released from the third insulating film is less than or equal to 1×10¹⁵ molecules/cm³ as heated at a temperature higher than or equal to 65° C. lower than or equal to 610° C. by thermal desorption spectroscopy.
 2. The method for manufacturing the semiconductor device according to claim 1, wherein the insulating film is formed by plasma enhanced chemical vapor deposition without using an ammonia gas as deposition gas.
 3. The method for manufacturing the semiconductor device according to claim 2, wherein the insulating film is formed by the plasma enhanced chemical vapor deposition using silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 seem as deposition gas.
 4. The method for manufacturing the semiconductor device according to claim 1, wherein the insulating film is formed by a plasma enhanced chemical vapor deposition using silane with a flow rate of 200 seem, nitrogen with a flow rate of 2000 seem, and ammonia with a flow rate of 100 seem as deposition gas.
 5. The method for manufacturing the semiconductor device according to claim 1, wherein the conductive film is formed by sputtering using argon with a flow rate of 72 seem and oxygen with a flow rate of 5 seem as a sputtering gas, and sputtering target (In₂0₃:Sn0₂:SiO₂=85:10:5 [wt %]).
 6. A method for manufacturing a semiconductor device comprising the steps of: forming a first conductive film; forming a first insulating film over the first conductive film; forming a second conductive film over the first insulating film; forming a second insulating film over the second conductive film; forming an opening reaching the first conductive film in the first insulating film and the second insulating film; forming a third conductive film over the first conductive film with the opening; forming a third insulating film over the third conductive film, wherein a part of the third conductive film is formed in the opening of the first insulating film and the second insulating film, wherein the third conductive film comprises one or more of indium and oxygen, and wherein the third insulating film includes silicon and nitrogen, and the number of ammonia molecules released from the third insulating film is less than or equal to 1×10¹⁵ molecules/cm³ as heated at a temperature higher than or equal to 65° C. lower than or equal to 610° C. by thermal desorption spectroscopy.
 7. The method for manufacturing the semiconductor device according to claim 6 wherein the third insulating film is formed by plasma enhanced chemical vapor deposition without using an ammonia gas as deposition gas.
 8. The method for manufacturing the semiconductor device according to claim 7, wherein the third insulating film is formed by the plasma enhanced chemical vapor deposition using silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 seem as deposition gas.
 9. The method for manufacturing the semiconductor device according to claim 6, wherein the third insulating film is formed by a plasma enhanced chemical vapor deposition using silane with a flow rate of 200 seem, nitrogen with a flow rate of 2000 seem, and ammonia with a flow rate of 100 seem as deposition gas.
 10. The method for manufacturing the semiconductor device according to claim 6, wherein the third conductive film is formed by sputtering using argon with a flow rate of 72 seem and oxygen with a flow rate of 5 seem as a sputtering gas, and sputtering target (In₂0₃:Sn0₂:SiO₂=85:10:5 [wt %]).
 11. The method for manufacturing the semiconductor device according to claim 6, further comprising the step of forming an oxide semiconductor film over the first insulating film, wherein the oxide semiconductor film includes oxygen, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf).
 12. The method for manufacturing the semiconductor device according to claim 6, wherein the third insulating film is a single-layer structure.
 13. A method for manufacturing a semiconductor device comprising the steps of: forming a first conductive film; forming a first insulating film over the first conductive film; forming an oxide semiconductor film over the first insulating film; forming a pair of second conductive films electrically connected to the oxide semiconductor film; forming a second insulating film over the oxide semiconductor film and the pair of second conductive films; forming an opening reaching the first conductive film in the first insulating film and the second insulating film; forming a third conductive film over the first conductive film with the opening; forming a third insulating film over the third conductive film, wherein a part of the third conductive film is formed in the opening of the first insulating film and the second insulating film, wherein the third conductive film comprises one or more of indium and oxygen, and wherein the third insulating film includes silicon and nitrogen, and the number of ammonia molecules released from the third insulating film is less than or equal to 1×10¹⁵ molecules/cm³ as heated at a temperature higher than or equal to 65° C. lower than or equal to 610° C. by thermal desorption spectroscopy.
 14. The method for manufacturing the semiconductor device according to claim 13, wherein the third insulating film is formed by plasma enhanced chemical vapor deposition without using an ammonia gas as deposition gas.
 15. The method for manufacturing the semiconductor device according to claim 14, wherein the third insulating film is formed by the plasma enhanced chemical vapor deposition using silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 seem as deposition gas.
 16. The method for manufacturing the semiconductor device according to claim 13, wherein the third insulating film is formed by a plasma enhanced chemical vapor deposition using silane with a flow rate of 200 seem, nitrogen with a flow rate of 2000 seem, and ammonia with a flow rate of 100 seem as deposition gas.
 17. The method for manufacturing the semiconductor device according to claim 13, wherein the third conductive film is formed by sputtering using argon with a flow rate of 72 seem and oxygen with a flow rate of 5 seem as a sputtering gas, and sputtering target (In₂0₃:Sn0₂:SiO₂=85:10:5 [wt %]).
 18. The method for manufacturing the semiconductor device according to claim 13, further comprising the step of forming an oxide semiconductor film over the first insulating film, wherein the oxide semiconductor film includes oxygen, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf).
 19. The method for manufacturing the semiconductor device according to claim 13, wherein the third insulating film is a single-layer structure. 